Apostolos Tapsas
ba90cdeb5a
SuperVector constructors as well as andnot implementation fixed
2021-11-05 13:34:48 +00:00
apostolos
d9d39d48c5
prints commants and formating fixes
2021-11-01 10:09:15 +02:00
apostolos
bf54aae779
Special case for Shuffle test added as well as comments for respectives implementations
2021-10-26 11:48:33 +03:00
Apostolos Tapsas
1eb3b19f63
Shuffle simd and SuperVector implementetions as well as their test realy fixed
2021-10-25 09:19:30 +03:00
Apostolos Tapsas
d43d6733b6
SuperVector shuffle implementation and test function optimized
2021-10-22 11:55:39 +00:00
apostolos
57301721f1
print functions missing keywords replaced
2021-10-22 12:38:16 +03:00
apostolos
24f149f239
print functions keyword renamed
2021-10-22 12:36:07 +03:00
Apostolos Tapsas
5abda15c26
expand128 bugs fixed
2021-10-22 07:05:55 +00:00
apostolos
7184ce9870
expand128 implementation was changed to be like arm's
2021-10-22 09:46:04 +03:00
Apostolos Tapsas
2b1db73326
WIP: simd & bitutils files finctions fixes
2021-10-21 13:34:02 +00:00
Apostolos Tapsas
558313a2c2
SuperVector operators fixes and simd_utils low/high64 functions implementations added
2021-10-18 12:26:38 +00:00
Apostolos Tapsas
e084c2d6e4
SuperVector vsh* implementations
2021-10-15 14:07:17 +00:00
apostolos
b1f53f8e49
match file for ARCH_PPC64EL added
2021-10-14 16:26:59 +03:00
apostolos
d0a41252c8
blockSigleMask implementations for ARCH_PPC64 added
2021-10-14 15:56:13 +03:00
apostolos
4d2acd59e2
Supervector vsh* added
2021-10-14 15:08:23 +03:00
Apostolos Tapsas
7888dd4418
WIP: Power VSX support almost completed
2021-10-14 13:53:55 +03:00
Vectorcamp
2231f7c024
compile fixes for vsc port
2021-10-14 13:53:55 +03:00
apostolos
90d3db1776
update powerpc simd util file functions
2021-10-14 13:53:55 +03:00
apostolos
0078c28ee6
implementations for powerpc64el architecture
2021-10-14 13:53:55 +03:00
Konstantinos Margaritis
1f55d419eb
add initial ppc64el support
...
(cherry picked from commit 63e26a4b2880eda7b6ac7b49271d83ba3e6143c4)
(cherry picked from commit c214ba253327114c16d0724f75c998ab00d44919)
2021-10-14 13:53:55 +03:00
Konstantinos Margaritis
4e044d4142
Add missing copyright info from tampered files
2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
c3baf3d296
fix multiple/undefined symbols when using fat runtimes
2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
9d0c15c448
add simd_onebit_masks as static in arm simd_utils.h as well
2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
577e03e0c7
rearrange method declarations
2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
9c54412447
remove simd_utils.c
2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
8b7ba89cb5
add x86 vsh* implementations
2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
eebd6c97bc
use movemask
2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
6ceab8435d
add header define to avoid double inclusion
2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
fa3d509fad
firstMatch/lastMatch are now arch-dependent, emulating movemask on non-Intel is very costly, the alternative is almost twice as fast on Arm
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
67e0674df8
Changes/Additions to SuperVector class * added ==,!=,>=,>,<=,< operators * reworked shift operators to be more uniform and orthogonal, like Arm ISA * Added Unroller class to allow handling of multiple cases but avoid code duplication * pshufb method can now emulate Intel or not (avoids one instruction).
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
e7161fdfec
initial SSE/AVX2 implementation
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
08357a096c
remove Windows/ICC support
2021-10-12 11:51:34 +03:00
apostolos
67fa6d2738
alignr methods for avx2 and avx512 added
2021-10-12 11:51:34 +03:00
George Wort
a879715953
Move SVE functions into their own files.
...
Change-Id: I995ba4b7d2b558ee403693ee45d747d414d3b177
2021-10-12 11:51:34 +03:00
George Wort
c95a4c3dd1
Use SVE for single shufti.
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Change-Id: Ic76940c5bb9b81a1c45d39e9ca396a158c50a7dc
2021-10-12 11:51:34 +03:00
George Wort
ab5d4d9279
Replace USE_ARM_SVE with HAVE_SVE.
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Change-Id: I469efaac197cba93201f2ca6eca78ca61be3054d
2021-10-12 11:51:34 +03:00
George Wort
8242f46ed7
Add Licence to state_compress and bitutils.
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Change-Id: I958daf82e5aef5bd306424dcfa7812382b266d65
2021-10-12 11:51:34 +03:00
George Wort
c7086cb7f1
Add SVE2 support for dvermicelli
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Change-Id: I056ef15e162ab6fb1f78964321ce893f4096367e
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
603bc14cdd
fix failing corner case, add pshufb_maskz()
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
e35b88f2c8
use STL make_unique, remove wrapper header, breaks C++17 compilation
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
f2d9784979
fix loadu_maskz, add {l,r}shift128_var(), tab fixes
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
f8ce0bb922
minor fixes, add 2 constructors from half size vectors
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
cabd13d18a
fix lastMatch<64>
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
ebb1b84ae3
provide an {l,r}shift128_var() to fix immediate value build failure in loadu_maskz
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
825460856f
fix arm loadu_maskz()
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
86accf41a3
add arm rshift128/rshift128
2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
6c51f7f591
add {l,r}shift128()+tests, rename printv_u64() to print64()
2021-10-12 11:51:34 +03:00
George Wort
051ceed0f9
Use SVE2 Bitperm's bdep instruction in bitutils and state_compress
...
Specifically for pdep64, expand32, and expand64 in bitutils,
as well as all of the loadcompressed functions used in
state_compress.
Change-Id: I92851bd12481dbee6a7e344df0890c4901b56d01
2021-10-12 11:51:34 +03:00
George Wort
9fb79ac3ec
Add SVE2 support for vermicelli
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Change-Id: Ia025de53521fbaefe5fb1e4425aaf75c7d80a14e
2021-10-12 11:51:34 +03:00
apostolos
6f88ecac44
Supervector test fixes
2021-10-12 11:51:34 +03:00
