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Shuffle simd and SuperVector implementetions as well as their test realy fixed

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Apostolos Tapsas 2021-10-24 16:52:12 +00:00 committed by apostolos
parent d43d6733b6
commit 1eb3b19f63
6 changed files with 26 additions and 12 deletions
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1
src/nfa/limex_shuffle.h
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@ -45,7 +45,6 @@
static really_inline
u32 packedExtract128(m128 s, const m128 permute, const m128 compare) {
m128 shuffled = pshufb_m128(s, permute);
print_m128_16x8("shufled", shuffled);
m128 compared = and128(shuffled, compare);
u16 rv = ~movemask128(eq128(compared, shuffled));
return (u32)rv;

4
src/util/arch/ppc64el/simd_utils.h
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@ -462,7 +462,9 @@ char testbit128(m128 val, unsigned int n) {
static really_inline
m128 pshufb_m128(m128 a, m128 b) {
return (m128) vec_perm((uint8x16_t)a, (uint8x16_t)a, (uint8x16_t)b);
uint8x16_t mask =(uint8x16_t)vec_cmpge((uint8x16_t)b, (uint8x16_t)vec_splats((uint8_t)0x80));
uint8x16_t res = vec_perm ((uint8x16_t)a, (uint8x16_t)a, (uint8x16_t)b);
return (m128) vec_sel((uint8x16_t)res, (uint8x16_t)zeroes128(), (uint8x16_t)mask);
}
static really_inline

4
src/util/supervector/arch/ppc64el/impl.cpp
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@ -603,7 +603,9 @@ template<>
template<>
really_inline SuperVector<16> SuperVector<16>::pshufb<false>(SuperVector<16> b)
{
return (m128) vec_perm((uint8x16_t)u.v128[0], (uint8x16_t)u.v128[0], (uint8x16_t)b.u.v128[0]);
uint8x16_t mask =(uint8x16_t)vec_cmpge((uint8x16_t)b.u.v128[0], (uint8x16_t)vec_splats((uint8_t)0x80));
uint8x16_t res = vec_perm ((uint8x16_t)u.v128[0], (uint8x16_t)u.v128[0], (uint8x16_t)b.u.v128[0]);
return (m128) vec_sel((uint8x16_t)res, (uint8x16_t)vec_splat_s8(0), (uint8x16_t)mask);
}
template<>

6
unit/internal/shuffle.cpp
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@ -187,7 +187,7 @@ TEST(Shuffle, PackedExtract128_1) {
// shuffle a single 1 bit to the front
m128 permute, compare;
build_pshufb_masks_onebit(i, &permute, &compare);
EXPECT_EQ(1U, packedExtract128(setbit<m128>(i), permute, compare));
EXPECT_EQ(1U, packedExtract128(setbit<m128>(i), permute, compare));
EXPECT_EQ(1U, packedExtract128(ones128(), permute, compare));
// we should get zero out of these cases
EXPECT_EQ(0U, packedExtract128(zeroes128(), permute, compare));
@ -199,7 +199,7 @@ TEST(Shuffle, PackedExtract128_1) {
}
}
/*
TEST(Shuffle, PackedExtract_templatized_128_1) {
// Try all possible one-bit masks
for (unsigned int i = 0; i < 128; i++) {
@ -218,7 +218,7 @@ TEST(Shuffle, PackedExtract_templatized_128_1) {
}
}
}
*/
#if defined(HAVE_AVX2)

17
unit/internal/simd_utils.cpp
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@ -849,15 +849,22 @@ TEST(SimdUtilsTest, pshufb_m128) {
}
u8 vec2[16];
for (int i=0; i<16; i++) {
vec2[i]=i + (rand() % 16 + 0);
}
vec2[i]=i + (rand() % 15 + 0);
}
m128 v1 = loadu128(vec);
m128 v2 = loadu128(vec2);
m128 vres = pshufb_m128(v1, v2);
m128 vres = pshufb_m128(v1, v2);
u8 res[16];
store128(res, vres);
storeu128(res, vres);
for (int i=0; i<16; i++) {
ASSERT_EQ(vec[vec2[i] % 16 ], res[i]);
if(vec2[i] & 0x80){
ASSERT_EQ(res[i], 0);
}else{
ASSERT_EQ(vec[vec2[i] % 16 ], res[i]);
}
}
}

6
unit/internal/supervector.cpp
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@ -286,7 +286,11 @@ TEST(SuperVectorUtilsTest,pshufb128c) {
auto SP2 = SuperVector<16>::loadu(vec2);
auto SResult = SP1.template pshufb<true>(SP2);
for (int i=0; i<16; i++) {
ASSERT_EQ(vec[vec2[i] % 16 ],SResult.u.u8[i]);
if(vec2[i] & 0x80){
ASSERT_EQ(SResult.u.u8[i], 0);
}else{
ASSERT_EQ(vec[vec2[i] % 16 ],SResult.u.u8[i]);
}
}
}