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108 Commits

Author SHA1 Message Date
Danila Kutenin
7e7f604f7d Fix ppc64el debug 2022-06-26 23:05:17 +00:00
Danila Kutenin
849846700a Minor fix 2022-06-26 23:02:02 +00:00
Danila Kutenin
8a49e20bcd Fix formatting of a couple files 2022-06-26 22:59:58 +00:00
Danila Kutenin
49eb18ee4f Optimize vectorscan for aarch64 by using shrn instruction 
This optimization is based on the thread
https://twitter.com/Danlark1/status/1539344279268691970 and uses
shift right and narrow by 4 instruction https://developer.arm.com/documentation/ddi0596/2020-12/SIMD-FP-Instructions/SHRN--SHRN2--Shift-Right-Narrow--immediate--

To achieve that, I needed to redesign a little movemask into comparemask
and have an additional step towards mask iteration. Our benchmarks
showed 10-15% improvement on average for long matches.
 2022-06-26 22:55:45 +00:00
Daniel Kutenin
288491d6d9
Optimized and correct version of movemask128 for ARM 
Closes #99

https://gcc.godbolt.org/z/cTjKqzcvn

Previous version was not correct because movemask thought of having bytes 0xFF. We can fully match the semantics + do it faster with USRA instructions.

Re-submission to a develop branch
 2022-04-18 13:37:53 +01:00
Konstantinos Margaritis
4589f1742e minor fixes 2021-12-07 08:49:59 +00:00
Konstantinos Margaritis
fd2eabd071 fix clang-release-arm compilation 2021-12-07 08:43:52 +00:00
Konstantinos Margaritis
fec557c1f9 fix wrong castings for NEON 2021-12-06 21:35:51 +00:00
Konstantinos Margaritis
290eabbca0 fix compilation with clang and some incomplete/wrong implementations for arm this time 2021-12-06 18:22:58 +00:00
Konstantinos Margaritis
5aae719ecd fix build with clang, in particular VSX uses long long instead of int64_t, gcc allows this, clang does not 2021-12-02 18:01:00 +02:00
Konstantinos Margaritis
7d600c4fcb bump base requirements to SSE4.2 2021-12-01 23:20:02 +02:00
Konstantinos Margaritis
cd95b1a38c use __builtin_constant_p() instead for arm as well 2021-11-25 06:20:53 +00:00
Apostolos Tapsas
35e5369c70 *fix palignr implementation for VSX Release mode 
*add unit test for palignr
*enable unit test building for Release mode
 2021-11-24 15:03:49 +00:00
Apostolos Tapsas
e13bfec734 found and solved very hard to track bug of intrinsic function palignr, that manifested only in Release builds and not Debug builds in a particular number of tests 2021-11-24 11:18:18 +00:00
Apostolos Tapsas
54158a1746 vermicelli and match implementations for ppc64el added 2021-11-13 19:36:46 +00:00
apostolos
e09d8674b4 resolving conficts after merging 2021-11-13 18:58:22 +02:00
Konstantinos Margaritis
41b98d7d8f add len parameter to arm matchers as well 2021-11-08 19:45:36 +00:00
Apostolos Tapsas
82bea29f4e simd_utils functions fixed 2021-11-08 14:22:58 +00:00
Apostolos Tapsas
ba90cdeb5a SuperVector constructors as well as andnot implementation fixed 2021-11-05 13:34:48 +00:00
Konstantinos Margaritis
24fa54081b add len parameter and mask, fixes corner cases on AVX512 2021-11-05 14:30:22 +02:00
Konstantinos Margaritis
5eabceddcf renamed matcher functions, added new ones for Vermicelli 2021-11-01 16:28:50 +00:00
Konstantinos Margaritis
7b65b298c1 add arm vector types in union, avoid -flax-conversions, fix castings 2021-11-01 16:52:17 +02:00
apostolos
d9d39d48c5 prints commants and formating fixes 2021-11-01 10:09:15 +02:00
apostolos
bf54aae779 Special case for Shuffle test added as well as comments for respectives implementations 2021-10-26 11:48:33 +03:00
Apostolos Tapsas
1eb3b19f63 Shuffle simd and SuperVector implementetions as well as their test realy fixed 2021-10-25 09:19:30 +03:00
Apostolos Tapsas
d43d6733b6 SuperVector shuffle implementation and test function optimized 2021-10-22 11:55:39 +00:00
apostolos
57301721f1 print functions missing keywords replaced 2021-10-22 12:38:16 +03:00
apostolos
24f149f239 print functions keyword renamed 2021-10-22 12:36:07 +03:00
Apostolos Tapsas
5abda15c26 expand128 bugs fixed 2021-10-22 07:05:55 +00:00
apostolos
7184ce9870 expand128 implementation was changed to be like arm's 2021-10-22 09:46:04 +03:00
Apostolos Tapsas
2b1db73326 WIP: simd & bitutils files finctions fixes 2021-10-21 13:34:02 +00:00
Apostolos Tapsas
558313a2c2 SuperVector operators fixes and simd_utils low/high64 functions implementations added 2021-10-18 12:26:38 +00:00
Apostolos Tapsas
e084c2d6e4 SuperVector vsh* implementations 2021-10-15 14:07:17 +00:00
apostolos
b1f53f8e49 match file for ARCH_PPC64EL added 2021-10-14 16:26:59 +03:00
Apostolos Tapsas
7888dd4418 WIP: Power VSX support almost completed 2021-10-14 13:53:55 +03:00
Vectorcamp
2231f7c024 compile fixes for vsc port 2021-10-14 13:53:55 +03:00
apostolos
90d3db1776 update powerpc simd util file functions 2021-10-14 13:53:55 +03:00
Konstantinos Margaritis
1f55d419eb add initial ppc64el support 
(cherry picked from commit 63e26a4b2880eda7b6ac7b49271d83ba3e6143c4)
(cherry picked from commit c214ba253327114c16d0724f75c998ab00d44919)
 2021-10-14 13:53:55 +03:00
Konstantinos Margaritis
4e044d4142 Add missing copyright info from tampered files 2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
9d0c15c448 add simd_onebit_masks as static in arm simd_utils.h as well 2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
9c54412447 remove simd_utils.c 2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
eebd6c97bc use movemask 2021-10-12 11:51:35 +03:00
Konstantinos Margaritis
fa3d509fad firstMatch/lastMatch are now arch-dependent, emulating movemask on non-Intel is very costly, the alternative is almost twice as fast on Arm 2021-10-12 11:51:34 +03:00
Konstantinos Margaritis
08357a096c remove Windows/ICC support 2021-10-12 11:51:34 +03:00
George Wort
a879715953 Move SVE functions into their own files. 
Change-Id: I995ba4b7d2b558ee403693ee45d747d414d3b177
 2021-10-12 11:51:34 +03:00
George Wort
c95a4c3dd1 Use SVE for single shufti. 
Change-Id: Ic76940c5bb9b81a1c45d39e9ca396a158c50a7dc
 2021-10-12 11:51:34 +03:00
George Wort
8242f46ed7 Add Licence to state_compress and bitutils. 
Change-Id: I958daf82e5aef5bd306424dcfa7812382b266d65
 2021-10-12 11:51:34 +03:00
George Wort
c7086cb7f1 Add SVE2 support for dvermicelli 
Change-Id: I056ef15e162ab6fb1f78964321ce893f4096367e
 2021-10-12 11:51:34 +03:00
George Wort
051ceed0f9 Use SVE2 Bitperm's bdep instruction in bitutils and state_compress 
Specifically for pdep64, expand32, and expand64 in bitutils,
as well as all of the loadcompressed functions used in
state_compress.

Change-Id: I92851bd12481dbee6a7e344df0890c4901b56d01
 2021-10-12 11:51:34 +03:00
George Wort
9fb79ac3ec Add SVE2 support for vermicelli 
Change-Id: Ia025de53521fbaefe5fb1e4425aaf75c7d80a14e
 2021-10-12 11:51:34 +03:00