Chang, Harry
56cb107005
AVX512VBMI Fat Teddy.
2021-01-25 14:13:13 +02:00
Konstantinos Margaritis
87413fbff0
optimize get_conf_stride_1()
2021-01-25 12:13:35 +02:00
Konstantinos Margaritis
4686ac47b6
replace andn() by explicit bitops and group loads/stores, gives ~1% gain
2021-01-25 12:13:35 +02:00
Konstantinos Margaritis
b62247a36e
borrow cache prefetching tricks from the Marvell port, seem to improve performance by 5-28%
2021-01-25 12:13:35 +02:00
Konstantinos Margaritis
39945b7775
clear zones array
2020-12-03 19:30:50 +02:00
Konstantinos Margaritis
17ab42d891
small optimization that was for some reason failing in ARM, should be faster anyway
2020-11-24 17:59:42 +02:00
Konstantinos Margaritis
5333467249
fix names, use own intrinsic instead of explicit _mm* ones
2020-09-23 11:51:21 +03:00
Konstantinos Margaritis
9f3ad89ed6
move andn helper function to bitutils.h
2020-09-22 12:17:27 +03:00
Chang, Harry
e665e959a0
Revert to AVX2 Fat Teddy instead of AVX512 reinforced Fat Teddy.
2020-05-25 13:47:53 +00:00
Chang, Harry
43204dda48
AVX512VBMI Teddy.
2020-05-25 13:47:53 +00:00
Hong, Yang A
23e5f06594
add new Literal API for pure literal expressions:
...
Design compile time api hs_compile_lit() and hs_compile_lit_multi()
to handle pure literal pattern sets. Corresponding option --literal-on
is added for hyperscan testing suites. Extended parameters and part of
flags are not supported for this api.
2019-08-13 14:51:38 +08:00
Mostafa Nazari
92edc37c1f
BUGFIX: fix Numerical result out of range error
...
Fix Error errno=34, fix Numerical result out of range error
issue: https://github.com/intel/hyperscan/issues/155
2019-08-13 14:49:24 +08:00
Hong, Yang A
f68723a606
literal matching: separate path for pure literal patterns
2019-01-21 09:59:22 +08:00
Matthew Barr
5fc2c803a2
teddy: alignment decl should match defn
...
Spotted by coverity. #174512
2017-09-18 13:29:34 +10:00
Justin Viiret
85c8822dd1
fdr_compile: simplify lambda use
...
This was failing to compile on MSVC.
2017-09-18 13:29:33 +10:00
Justin Viiret
36136f1003
fdr_compile: don't do string copies in isSuffix
2017-09-18 13:26:05 +10:00
Justin Viiret
164e5a929f
fdr_compile: faster scoring code
2017-08-21 11:25:21 +10:00
Alex Coyte
41783fe912
more comments on hwlm/fdr's start parameter
2017-08-21 11:23:41 +10:00
Chang, Harry
404f739811
Compile dump of teddy's nibble masks and reinforcement table in fdr_dump.cpp
2017-08-21 11:18:43 +10:00
Chang, Harry
72d21a9acf
Refactored building reinforcement table at compile time and updated comments.
2017-08-21 11:14:59 +10:00
Chang, Harry
2b1d3383aa
replace "_avx2" with "_fat".
2017-08-21 11:14:59 +10:00
Chang, Harry
8da2d13baa
AVX512 Reinforced FAT teddy.
2017-08-21 11:14:59 +10:00
Justin Viiret
9cf66b6ac9
util: switch from Boost to std::unordered set/map
...
This commit replaces the ue2::unordered_{set,map} types with their STL
versions, with some new hashing utilities in util/hash.h. The new types
ue2_unordered_set<T> and ue2_unordered_map<Key, T> default to using the
ue2_hasher.
The header util/ue2_containers.h has been removed, and the flat_set/map
containers moved to util/flat_containers.h.
2017-08-21 11:14:55 +10:00
Wang, Xiang W
252eb820c4
ue-3145: make parents of included literals exclusive
2017-08-21 11:12:36 +10:00
Wang, Xiang W
86c5f7feb1
FDR: Squash buckets of included literals in FDR confirm
...
- Change the compile of literal matchers to two passes.
- Reverse the bucket assignment in FDR, bucket with longer literals has
smaller bucket id.
- Squash the buckets of included literals and jump to the the program of
included literals directly from parent literal program without going
through FDR confirm for included iterals.
2017-08-21 11:12:36 +10:00
Chang, Harry
d2b5523dd8
fix typo "ones_u32a" => "ones_u32"
2017-08-21 11:12:36 +10:00
Chang, Harry
68e08d8e18
AVX512 reinforced teddy.
2017-08-21 11:12:36 +10:00
Wang, Xiang W
67a8f43355
literal matchers: change context passed to callback to scratch
2017-08-21 11:12:36 +10:00
Wang, Xiang W
815be3fa2b
flood detection: debug output fix
2017-08-21 11:12:36 +10:00
Wang, Xiang W
ebb1b0006b
remove start argument in literal matcher callbacks
2017-08-21 11:12:36 +10:00
Chang, Harry
35a42061f6
patch for invalid reading 1 byte in Reinforced Teddy, abandon fetching the first reinforced byte.
2017-08-21 11:12:26 +10:00
Justin Viiret
cbcc46444b
fdr/teddy: dump confirm lit load
2017-08-21 11:10:11 +10:00
Justin Viiret
e4788aae1a
fdr/teddy: store and dump number of strings
2017-08-21 11:10:11 +10:00
Justin Viiret
a17ef3e48a
fdr_dump: dump FDRConfirm structures for fdr
2017-08-21 11:10:11 +10:00
Chang, Harry
dbd3f66e87
Reinforced Teddy with 1-byte approach, based on "shift-or" and AVX2.
2017-08-21 11:10:11 +10:00
Justin Viiret
cc4a5cc36f
teddy_compile: style fixes, whitespace
2017-08-21 11:10:01 +10:00
Justin Viiret
84a09d35d6
teddy_compile: use faster small containers
2017-08-21 11:10:01 +10:00
Justin Viiret
64db576b9e
fdr_confirm_compile: literals are now < 8 bytes
2017-08-21 10:39:00 +10:00
Justin Viiret
d94bf2fd62
fdr_confirm_compile: wrap comment
2017-08-21 10:39:00 +10:00
Justin Viiret
2b9b2ca911
fdr/teddy: remove padding from structures
2017-08-21 10:39:00 +10:00
Justin Viiret
71bd1c8dfe
teddy: clean up compile to match fdr style
2017-08-21 10:39:00 +10:00
Justin Viiret
e9d85f7b51
fdr_confirm: renumber FDR_LIT_FLAG_NOREPEAT
2017-08-21 10:39:00 +10:00
Justin Viiret
b126cbf556
fdr/teddy: simplify computing of confirm base
2017-08-21 10:39:00 +10:00
Justin Viiret
06bafae81d
fdr_confirm: clean up use of flags
2017-08-21 10:39:00 +10:00
Justin Viiret
c878d5ec66
fdr: further tidy up layout
2017-08-21 10:39:00 +10:00
Justin Viiret
549062ec2b
fdr_confirm: start FDRConfirm structs at cacheline
2017-08-21 10:38:59 +10:00
Justin Viiret
4f32a167d5
teddy: align major structures to cachelines
2017-08-21 10:38:59 +10:00
Justin Viiret
9bdd370163
fdr: align major structures to cachelines
2017-08-21 10:38:59 +10:00
Justin Viiret
c36c071564
fdr_confirm: remove dead flags
...
- Caseless was unused
- NoFlags is a bit redundant
2017-08-21 10:38:59 +10:00
Justin Viiret
e8c0b5685f
fdr_confirm: remove complex confirm
2017-08-21 10:38:59 +10:00