Remove enum mqe_event and use u32 for queue events

We were using intermediate values int he enum and casting back and forth
with a u32; it is cleaner to just use a u32 and define some special
values.

Silences ICC warning #188: enumerated type mixed with another type.
This commit is contained in:
Justin Viiret 2015-10-23 10:59:48 +11:00 committed by Matthew Barr
parent 9ff1303cd8
commit 55b357f7d1
6 changed files with 29 additions and 25 deletions

View File

@ -151,12 +151,12 @@ char JOIN(ENGINE_EXEC_NAME, _TopScan)(const struct NFA *nfa, struct mq *q,
while (1) {
// Find the next top with location >= the last escape we saw.
for (; q->cur < q->end && q_cur_loc(q) <= end; q->cur++) {
enum mqe_event t = q_cur_type(q);
if ((t == MQE_TOP || t == MQE_TOP_FIRST) &&
u32 event = q_cur_type(q);
if ((event == MQE_TOP || event == MQE_TOP_FIRST) &&
q_cur_offset(q) >= lstate->lastEscape) {
goto found_top;
}
DEBUG_PRINTF("skip event type=%d offset=%lld\n", t, q_cur_offset(q));
DEBUG_PRINTF("skip event type=%u offset=%lld\n", event, q_cur_offset(q));
}
// No more tops, we're done.

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@ -250,7 +250,7 @@ void fillCounterInfos(vector<mpv_counter_info> *out, u32 *curr_decomp_offset,
const map<ClusterKey, vector<raw_puff>> &kilopuffs) {
/* first the triggered puffs */
map<ClusterKey, vector<raw_puff>>::const_iterator it = kilopuffs.begin();
while (it != kilopuffs.end() && it->first.trigger_event != ~0U) {
while (it != kilopuffs.end() && it->first.trigger_event != MQE_INVALID) {
assert(!it->first.auto_restart);
assert(it->first.trigger_event
== MQE_TOP_FIRST + distance(kilopuffs.begin(), it));
@ -268,7 +268,7 @@ void fillCounterInfos(vector<mpv_counter_info> *out, u32 *curr_decomp_offset,
*/
map<ClusterKey, vector<raw_puff>>::const_iterator trig_ite = it;
while (it != kilopuffs.end() && !it->first.auto_restart) {
assert(it->first.trigger_event == ~0U);
assert(it->first.trigger_event == MQE_INVALID);
++it;
}
@ -278,7 +278,7 @@ void fillCounterInfos(vector<mpv_counter_info> *out, u32 *curr_decomp_offset,
kilopuffs, kilopuffs.begin(), it);
}
while (it != kilopuffs.end() && it->first.auto_restart) {
assert(it->first.trigger_event == ~0U);
assert(it->first.trigger_event == MQE_INVALID);
out->push_back(mpv_counter_info());
map<ClusterKey, vector<raw_puff>>::const_iterator it_o = it;

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@ -41,24 +41,28 @@ extern "C"
#define MAX_MQE_LEN 10
/** Queue events */
enum mqe_event {
MQE_START = 0, /**< and begin! Note: stateless engines will start from
* this location */
MQE_END = 1, /**< stop scanning */
MQE_TOP = 2, /**< enable start + start dot star */
MQE_TOP_FIRST = 4, /**< first event corresponding to a TOP _N_ */
/*
* Additional tops (in multi-top engines) use the event values from
* MQE_TOP_FIRST to something.
*/
/** Queue event: begin scanning. Note: stateless engines will start from this
* location. */
#define MQE_START 0U
MQE_INVALID = ~0U
};
/** Queue event: stop scanning. */
#define MQE_END 1U
/** Queue event: enable start and start-dot-star. */
#define MQE_TOP 2U
/** Queue event: first event corresponding to a numbered TOP. Additional tops
* (in multi-top engines) use the event values from MQE_TOP_FIRST to
* MQE_INVALID - 1. */
#define MQE_TOP_FIRST 4U
/** Invalid queue event */
#define MQE_INVALID (~0U)
/** Queue item */
struct mq_item {
u32 type; /**< event; from mqe_event */
u32 type; /**< event type, from MQE_* */
s64a location; /**< relative to the start of the current buffer */
u64a som; /**< pattern start-of-match corresponding to a top, only used
* by som engines. */

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@ -391,7 +391,7 @@ hwlmcb_rv_t roseHandleSuffixTrigger(const struct RoseEngine *t,
}
}
enum mqe_event top = tr->suffixEvent;
u32 top = tr->suffixEvent;
assert(top == MQE_TOP || (top >= MQE_TOP_FIRST && top < MQE_INVALID));
pushQueueSom(q, top, loc, som);
@ -977,14 +977,14 @@ void roseTriggerInfixes(const struct RoseEngine *t, const struct RoseRole *tr,
do {
u32 qi = curr_r->queue;
u32 ri = queueToLeftIndex(t, qi);
enum mqe_event topEvent = curr_r->event;
u32 topEvent = curr_r->event;
u8 cancel = curr_r->cancel_prev_top;
assert(topEvent < MQE_INVALID);
const struct LeftNfaInfo *left = getLeftInfoByQueue(t, qi);
assert(!left->transient);
DEBUG_PRINTF("rose %u (qi=%u) event %u\n", ri, qi, (u32)topEvent);
DEBUG_PRINTF("rose %u (qi=%u) event %u\n", ri, qi, topEvent);
struct mq *q = tctxtToScratch(tctxt)->queues + qi;
const struct NfaInfo *info = getNfaInfoByQueue(t, qi);

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@ -2433,7 +2433,7 @@ vector<RoseTrigger> buildRoseTriggerList(const RoseGraph &g, RoseVertex u,
assert(num_tops(g[v].left) == 1);
top = MQE_TOP;
} else {
top = (enum mqe_event)((u32)MQE_TOP_FIRST + g[e].rose_top);
top = MQE_TOP_FIRST + g[e].rose_top;
assert(top < MQE_INVALID);
}

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@ -236,7 +236,7 @@ struct LeftNfaInfo {
// A list of these is used to trigger prefix/infix roses.
struct RoseTrigger {
u32 queue; // queue index of leftfix
u32 event; // from enum mqe_event
u32 event; // queue event, from MQE_*
u8 cancel_prev_top;
};
@ -309,7 +309,7 @@ struct RoseRole {
ReportID reportId; // report ID, or MO_INVALID_IDX
u32 stateIndex; /**< index into state multibit, or MMB_INVALID. Roles do not
* require a state bit if they are terminal */
u32 suffixEvent; // from enum mqe_event
u32 suffixEvent; // queue event, from MQE_
u8 depth; /**< depth of this vertex from root in the tree, or 255 if greater.
*/
u32 suffixOffset; /**< suffix nfa: 0 if no suffix associated with the role,