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https://github.com/VectorCamp/vectorscan.git
synced 2025-06-28 16:41:01 +03:00
Remove enum mqe_event and use u32 for queue events
We were using intermediate values int he enum and casting back and forth with a u32; it is cleaner to just use a u32 and define some special values. Silences ICC warning #188: enumerated type mixed with another type.
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@ -151,12 +151,12 @@ char JOIN(ENGINE_EXEC_NAME, _TopScan)(const struct NFA *nfa, struct mq *q,
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while (1) {
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// Find the next top with location >= the last escape we saw.
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for (; q->cur < q->end && q_cur_loc(q) <= end; q->cur++) {
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enum mqe_event t = q_cur_type(q);
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if ((t == MQE_TOP || t == MQE_TOP_FIRST) &&
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u32 event = q_cur_type(q);
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if ((event == MQE_TOP || event == MQE_TOP_FIRST) &&
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q_cur_offset(q) >= lstate->lastEscape) {
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goto found_top;
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}
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DEBUG_PRINTF("skip event type=%d offset=%lld\n", t, q_cur_offset(q));
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DEBUG_PRINTF("skip event type=%u offset=%lld\n", event, q_cur_offset(q));
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}
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// No more tops, we're done.
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@ -250,7 +250,7 @@ void fillCounterInfos(vector<mpv_counter_info> *out, u32 *curr_decomp_offset,
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const map<ClusterKey, vector<raw_puff>> &kilopuffs) {
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/* first the triggered puffs */
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map<ClusterKey, vector<raw_puff>>::const_iterator it = kilopuffs.begin();
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while (it != kilopuffs.end() && it->first.trigger_event != ~0U) {
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while (it != kilopuffs.end() && it->first.trigger_event != MQE_INVALID) {
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assert(!it->first.auto_restart);
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assert(it->first.trigger_event
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== MQE_TOP_FIRST + distance(kilopuffs.begin(), it));
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@ -268,7 +268,7 @@ void fillCounterInfos(vector<mpv_counter_info> *out, u32 *curr_decomp_offset,
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*/
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map<ClusterKey, vector<raw_puff>>::const_iterator trig_ite = it;
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while (it != kilopuffs.end() && !it->first.auto_restart) {
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assert(it->first.trigger_event == ~0U);
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assert(it->first.trigger_event == MQE_INVALID);
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++it;
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}
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@ -278,7 +278,7 @@ void fillCounterInfos(vector<mpv_counter_info> *out, u32 *curr_decomp_offset,
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kilopuffs, kilopuffs.begin(), it);
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}
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while (it != kilopuffs.end() && it->first.auto_restart) {
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assert(it->first.trigger_event == ~0U);
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assert(it->first.trigger_event == MQE_INVALID);
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out->push_back(mpv_counter_info());
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map<ClusterKey, vector<raw_puff>>::const_iterator it_o = it;
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@ -41,24 +41,28 @@ extern "C"
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#define MAX_MQE_LEN 10
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/** Queue events */
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enum mqe_event {
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MQE_START = 0, /**< and begin! Note: stateless engines will start from
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* this location */
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MQE_END = 1, /**< stop scanning */
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MQE_TOP = 2, /**< enable start + start dot star */
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MQE_TOP_FIRST = 4, /**< first event corresponding to a TOP _N_ */
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/*
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* Additional tops (in multi-top engines) use the event values from
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* MQE_TOP_FIRST to something.
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*/
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/** Queue event: begin scanning. Note: stateless engines will start from this
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* location. */
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#define MQE_START 0U
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MQE_INVALID = ~0U
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};
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/** Queue event: stop scanning. */
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#define MQE_END 1U
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/** Queue event: enable start and start-dot-star. */
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#define MQE_TOP 2U
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/** Queue event: first event corresponding to a numbered TOP. Additional tops
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* (in multi-top engines) use the event values from MQE_TOP_FIRST to
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* MQE_INVALID - 1. */
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#define MQE_TOP_FIRST 4U
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/** Invalid queue event */
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#define MQE_INVALID (~0U)
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/** Queue item */
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struct mq_item {
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u32 type; /**< event; from mqe_event */
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u32 type; /**< event type, from MQE_* */
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s64a location; /**< relative to the start of the current buffer */
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u64a som; /**< pattern start-of-match corresponding to a top, only used
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* by som engines. */
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@ -391,7 +391,7 @@ hwlmcb_rv_t roseHandleSuffixTrigger(const struct RoseEngine *t,
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}
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}
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enum mqe_event top = tr->suffixEvent;
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u32 top = tr->suffixEvent;
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assert(top == MQE_TOP || (top >= MQE_TOP_FIRST && top < MQE_INVALID));
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pushQueueSom(q, top, loc, som);
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@ -977,14 +977,14 @@ void roseTriggerInfixes(const struct RoseEngine *t, const struct RoseRole *tr,
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do {
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u32 qi = curr_r->queue;
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u32 ri = queueToLeftIndex(t, qi);
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enum mqe_event topEvent = curr_r->event;
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u32 topEvent = curr_r->event;
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u8 cancel = curr_r->cancel_prev_top;
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assert(topEvent < MQE_INVALID);
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const struct LeftNfaInfo *left = getLeftInfoByQueue(t, qi);
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assert(!left->transient);
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DEBUG_PRINTF("rose %u (qi=%u) event %u\n", ri, qi, (u32)topEvent);
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DEBUG_PRINTF("rose %u (qi=%u) event %u\n", ri, qi, topEvent);
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struct mq *q = tctxtToScratch(tctxt)->queues + qi;
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const struct NfaInfo *info = getNfaInfoByQueue(t, qi);
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@ -2433,7 +2433,7 @@ vector<RoseTrigger> buildRoseTriggerList(const RoseGraph &g, RoseVertex u,
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assert(num_tops(g[v].left) == 1);
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top = MQE_TOP;
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} else {
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top = (enum mqe_event)((u32)MQE_TOP_FIRST + g[e].rose_top);
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top = MQE_TOP_FIRST + g[e].rose_top;
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assert(top < MQE_INVALID);
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}
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@ -236,7 +236,7 @@ struct LeftNfaInfo {
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// A list of these is used to trigger prefix/infix roses.
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struct RoseTrigger {
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u32 queue; // queue index of leftfix
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u32 event; // from enum mqe_event
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u32 event; // queue event, from MQE_*
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u8 cancel_prev_top;
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};
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@ -309,7 +309,7 @@ struct RoseRole {
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ReportID reportId; // report ID, or MO_INVALID_IDX
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u32 stateIndex; /**< index into state multibit, or MMB_INVALID. Roles do not
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* require a state bit if they are terminal */
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u32 suffixEvent; // from enum mqe_event
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u32 suffixEvent; // queue event, from MQE_
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u8 depth; /**< depth of this vertex from root in the tree, or 255 if greater.
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*/
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u32 suffixOffset; /**< suffix nfa: 0 if no suffix associated with the role,
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