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63 lines
2.5 KiB
C
63 lines
2.5 KiB
C
/*
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* Copyright (c) 2016-2017, Intel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Intel Corporation nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/** \file
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* \brief Lookup tables to support SIMD operations.
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*/
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#include "simd_utils.h"
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ALIGN_CL_DIRECTIVE const char vbs_mask_data[] = {
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0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
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0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
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0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
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0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
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0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
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};
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#define ZEROES_8 0, 0, 0, 0, 0, 0, 0, 0
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#define ZEROES_31 ZEROES_8, ZEROES_8, ZEROES_8, 0, 0, 0, 0, 0, 0, 0
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#define ZEROES_32 ZEROES_8, ZEROES_8, ZEROES_8, ZEROES_8
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/** \brief LUT for the mask1bit functions. */
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ALIGN_CL_DIRECTIVE const u8 simd_onebit_masks[] = {
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ZEROES_32, ZEROES_32,
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ZEROES_31, 0x01, ZEROES_32,
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ZEROES_31, 0x02, ZEROES_32,
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ZEROES_31, 0x04, ZEROES_32,
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ZEROES_31, 0x08, ZEROES_32,
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ZEROES_31, 0x10, ZEROES_32,
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ZEROES_31, 0x20, ZEROES_32,
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ZEROES_31, 0x40, ZEROES_32,
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ZEROES_31, 0x80, ZEROES_32,
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ZEROES_32, ZEROES_32,
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};
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