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introduce Sheng-McClellan hybrid
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015, Intel Corporation
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* Copyright (c) 2015-2016, Intel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@@ -436,3 +436,16 @@ TEST(BitUtils, rank_in_mask64) {
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ASSERT_EQ(15, rank_in_mask64(0xf0f0f0f0f0f0f0f0ULL, 31));
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ASSERT_EQ(31, rank_in_mask64(0xf0f0f0f0f0f0f0f0ULL, 63));
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}
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#if defined(HAVE_PEXT) && defined(ARCH_64_BIT)
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TEST(BitUtils, pdep64) {
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u64a data = 0xF123456789ABCDEF;
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ASSERT_EQ(0xfULL, pdep64(data, 0xf));
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ASSERT_EQ(0xefULL, pdep64(data, 0xff));
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ASSERT_EQ(0xf0ULL, pdep64(data, 0xf0));
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ASSERT_EQ(0xfULL, pdep64(data, 0xf));
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ASSERT_EQ(0xef0ULL, pdep64(data, 0xff0));
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ASSERT_EQ(0xef00ULL, pdep64(data, 0xff00));
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ASSERT_EQ(0xd0e0f00ULL, pdep64(data, 0xf0f0f00));
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}
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#endif
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