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prints commants and formating fixes
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@@ -187,7 +187,7 @@ TEST(Shuffle, PackedExtract128_1) {
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// shuffle a single 1 bit to the front
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m128 permute, compare;
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build_pshufb_masks_onebit(i, &permute, &compare);
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EXPECT_EQ(1U, packedExtract128(setbit<m128>(i), permute, compare));
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EXPECT_EQ(1U, packedExtract128(setbit<m128>(i), permute, compare));
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EXPECT_EQ(1U, packedExtract128(ones128(), permute, compare));
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// we should get zero out of these cases
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EXPECT_EQ(0U, packedExtract128(zeroes128(), permute, compare));
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@@ -852,11 +852,11 @@ TEST(SimdUtilsTest, pshufb_m128) {
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vec2[i]=i + (rand() % 100 + 0);
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}
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/* On Intel, if bit 0x80 is set, then result is zero, otherwise which the lane it is &0xf.
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In NEON or PPC, if >=16, then the result is zero, otherwise it is that lane.
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Thus bellow we have to check that case to NEON or PPC. */
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// On Intel, if bit 0x80 is set, then result is zero, otherwise which the lane it is &0xf.
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// In NEON or PPC, if >=16, then the result is zero, otherwise it is that lane.
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// Thus bellow we have to check that case to NEON or PPC.
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/*Insure that vec3 has at least 1 or more 0x80 elements*/
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//Insure that vec3 has at least 1 or more 0x80 elements
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u8 vec3[16] = {0};
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vec3[15] = 0x80;
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@@ -874,7 +874,7 @@ TEST(SimdUtilsTest, pshufb_m128) {
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printf("\n");
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*/
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/*Test Special Case*/
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//Test Special Case
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m128 v1 = loadu128(vec);
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m128 v2 = loadu128(vec3);
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m128 vres = pshufb_m128(v1, v2);
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@@ -890,7 +890,7 @@ TEST(SimdUtilsTest, pshufb_m128) {
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}
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}
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/*Test Other Cases*/
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//Test Other Cases
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v1 = loadu128(vec);
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v2 = loadu128(vec2);
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vres = pshufb_m128(v1, v2);
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