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https://github.com/VectorCamp/vectorscan.git
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misc: docs, typo fixes, small cleanups
This commit is contained in:
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2017, Intel Corporation
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* Copyright (c) 2015-2018, Intel Corporation
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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@ -374,7 +374,7 @@ unique_ptr<GoughGraph> makeCFG(const raw_som_dfa &raw) {
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}
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}
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u16 top_sym = raw.alpha_remap[TOP];
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u16 top_sym = raw.alpha_remap[TOP];
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DEBUG_PRINTF("top: %hu, kind %d\n", top_sym, raw.kind);
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DEBUG_PRINTF("top: %hu, kind %s\n", top_sym, to_string(raw.kind).c_str());
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/* create edges, JOIN variables (on edge targets) */
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/* create edges, JOIN variables (on edge targets) */
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map<dstate_id_t, GoughEdge> seen;
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map<dstate_id_t, GoughEdge> seen;
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2016, Intel Corporation
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* Copyright (c) 2015-2018, Intel Corporation
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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@ -84,7 +84,7 @@ struct mcclellan {
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u8 has_accel; /**< 1 iff there are any accel plans */
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u8 has_accel; /**< 1 iff there are any accel plans */
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u8 remap[256]; /**< remaps characters to a smaller alphabet */
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u8 remap[256]; /**< remaps characters to a smaller alphabet */
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ReportID arb_report; /**< one of the accepts that this dfa may raise */
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ReportID arb_report; /**< one of the accepts that this dfa may raise */
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u32 accel_offset; /**< offset of the accel structures from start of NFA */
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u32 accel_offset; /**< offset of accel structures from start of McClellan */
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u32 haig_offset; /**< reserved for use by Haig, relative to start of NFA */
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u32 haig_offset; /**< reserved for use by Haig, relative to start of NFA */
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};
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};
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2016, Intel Corporation
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* Copyright (c) 2016-2018, Intel Corporation
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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@ -84,7 +84,7 @@ struct mcsheng {
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u8 has_accel; /**< 1 iff there are any accel plans */
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u8 has_accel; /**< 1 iff there are any accel plans */
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u8 remap[256]; /**< remaps characters to a smaller alphabet */
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u8 remap[256]; /**< remaps characters to a smaller alphabet */
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ReportID arb_report; /**< one of the accepts that this dfa may raise */
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ReportID arb_report; /**< one of the accepts that this dfa may raise */
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u32 accel_offset; /**< offset of the accel structures from start of NFA */
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u32 accel_offset; /**< offset of accel structures from start of McClellan */
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m128 sheng_masks[N_CHARS];
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m128 sheng_masks[N_CHARS];
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};
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};
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2017, Intel Corporation
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* Copyright (c) 2015-2018, Intel Corporation
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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@ -73,7 +73,7 @@ static
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void populateInit(const NGHolder &g, const flat_set<NFAVertex> &unused,
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void populateInit(const NGHolder &g, const flat_set<NFAVertex> &unused,
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stateset *init, stateset *initDS,
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stateset *init, stateset *initDS,
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vector<NFAVertex> *v_by_index) {
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vector<NFAVertex> *v_by_index) {
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DEBUG_PRINTF("graph kind: %u\n", (int)g.kind);
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DEBUG_PRINTF("graph kind: %s\n", to_string(g.kind).c_str());
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for (auto v : vertices_range(g)) {
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for (auto v : vertices_range(g)) {
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if (contains(unused, v)) {
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if (contains(unused, v)) {
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continue;
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continue;
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2017, Intel Corporation
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* Copyright (c) 2015-2018, Intel Corporation
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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@ -542,7 +542,8 @@ unique_ptr<raw_dfa> buildMcClellan(const NGHolder &graph,
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return nullptr;
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return nullptr;
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}
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}
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DEBUG_PRINTF("attempting to build ?%d? mcclellan\n", (int)graph.kind);
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DEBUG_PRINTF("attempting to build %s mcclellan\n",
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to_string(graph.kind).c_str());
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assert(allMatchStatesHaveReports(graph));
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assert(allMatchStatesHaveReports(graph));
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bool prunable = grey.highlanderPruneDFA && has_managed_reports(graph);
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bool prunable = grey.highlanderPruneDFA && has_managed_reports(graph);
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2017, Intel Corporation
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* Copyright (c) 2015-2018, Intel Corporation
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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@ -87,7 +87,11 @@ private:
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/** Find the set of characters that are not present in the reachability of
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/** Find the set of characters that are not present in the reachability of
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* graph \p g after a certain depth (currently 8). If a character in this set
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* graph \p g after a certain depth (currently 8). If a character in this set
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* is encountered, it means that the NFA is either dead or has not progressed
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* is encountered, it means that the NFA is either dead or has not progressed
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* more than 8 characters from its start states. */
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* more than 8 characters from its start states.
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*
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* This is only used to guide merging heuristics, use
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* findLeftOffsetStopAlphabet for real uses.
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*/
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CharReach findStopAlphabet(const NGHolder &g, som_type som) {
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CharReach findStopAlphabet(const NGHolder &g, som_type som) {
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const depth max_depth(MAX_STOP_DEPTH);
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const depth max_depth(MAX_STOP_DEPTH);
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const InitDepths depths(g);
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const InitDepths depths(g);
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015, Intel Corporation
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* Copyright (c) 2015-2018, Intel Corporation
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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@ -47,7 +47,11 @@ class NGHolder;
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/** Find the set of characters that are not present in the reachability of
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/** Find the set of characters that are not present in the reachability of
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* graph \p g after a certain depth (currently 8). If a character in this set
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* graph \p g after a certain depth (currently 8). If a character in this set
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* is encountered, it means that the NFA is either dead or has not progressed
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* is encountered, it means that the NFA is either dead or has not progressed
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* more than 8 characters from its start states. */
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* more than 8 characters from its start states.
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*
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* This is only used to guide merging heuristics, use
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* findLeftOffsetStopAlphabet for real uses.
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*/
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CharReach findStopAlphabet(const NGHolder &g, som_type som);
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CharReach findStopAlphabet(const NGHolder &g, som_type som);
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/** Calculate the stop alphabet for each depth from 0 to MAX_STOP_DEPTH. Then
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/** Calculate the stop alphabet for each depth from 0 to MAX_STOP_DEPTH. Then
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/*
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/*
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* Copyright (c) 2015-2017, Intel Corporation
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* Copyright (c) 2015-2018, Intel Corporation
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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@ -66,6 +66,7 @@ hwlmcb_rv_t roseHandleChainMatch(const struct RoseEngine *t,
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u64a top_squash_distance, u64a end,
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u64a top_squash_distance, u64a end,
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char in_catchup);
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char in_catchup);
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/** \brief Initialize the queue for a suffix/outfix engine. */
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static really_inline
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static really_inline
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void initQueue(struct mq *q, u32 qi, const struct RoseEngine *t,
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void initQueue(struct mq *q, u32 qi, const struct RoseEngine *t,
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struct hs_scratch *scratch) {
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struct hs_scratch *scratch) {
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@ -90,6 +91,7 @@ void initQueue(struct mq *q, u32 qi, const struct RoseEngine *t,
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info->stateOffset, *(u32 *)q->state);
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info->stateOffset, *(u32 *)q->state);
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}
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}
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/** \brief Initialize the queue for a leftfix (prefix/infix) engine. */
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static really_inline
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static really_inline
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void initRoseQueue(const struct RoseEngine *t, u32 qi,
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void initRoseQueue(const struct RoseEngine *t, u32 qi,
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const struct LeftNfaInfo *left,
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const struct LeftNfaInfo *left,
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/*
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/*
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* Copyright (c) 2015-2017, Intel Corporation
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* Copyright (c) 2015-2018, Intel Corporation
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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@ -501,8 +501,7 @@ hwlmcb_rv_t roseReport(const struct RoseEngine *t, struct hs_scratch *scratch,
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}
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}
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/* catches up engines enough to ensure any earlier mpv triggers are enqueued
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/* catches up engines enough to ensure any earlier mpv triggers are enqueued
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* and then adds the trigger to the mpv queue. Must not be called during catch
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* and then adds the trigger to the mpv queue. */
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* up */
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static rose_inline
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static rose_inline
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hwlmcb_rv_t roseCatchUpAndHandleChainMatch(const struct RoseEngine *t,
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hwlmcb_rv_t roseCatchUpAndHandleChainMatch(const struct RoseEngine *t,
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struct hs_scratch *scratch,
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struct hs_scratch *scratch,
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@ -453,7 +453,7 @@ RoseVertex tryForAnchoredVertex(RoseBuildImpl *tbi,
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<= tbi->cc.grey.maxAnchoredRegion) {
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<= tbi->cc.grey.maxAnchoredRegion) {
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if (ep.maxBound || ep.minBound) {
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if (ep.maxBound || ep.minBound) {
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/* TODO: handle, however these cases are not generated currently by
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/* TODO: handle, however these cases are not generated currently by
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ng_rose */
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ng_violet */
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return RoseGraph::null_vertex();
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return RoseGraph::null_vertex();
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}
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}
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max_width = depth(ep.maxBound + iv_info.s.length());
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max_width = depth(ep.maxBound + iv_info.s.length());
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@ -567,7 +567,7 @@ void doRoseLiteralVertex(RoseBuildImpl *tbi, bool use_eod_table,
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assert(iv_info.type == RIV_LITERAL);
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assert(iv_info.type == RIV_LITERAL);
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assert(!parents.empty()); /* start vertices should not be here */
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assert(!parents.empty()); /* start vertices should not be here */
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// ng_rose should have ensured that mixed-sensitivity literals are no
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// ng_violet should have ensured that mixed-sensitivity literals are no
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// longer than the benefits max width.
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// longer than the benefits max width.
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assert(iv_info.s.length() <= MAX_MASK2_WIDTH ||
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assert(iv_info.s.length() <= MAX_MASK2_WIDTH ||
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!mixed_sensitivity(iv_info.s));
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!mixed_sensitivity(iv_info.s));
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2017, Intel Corporation
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* Copyright (c) 2015-2018, Intel Corporation
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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@ -459,7 +459,7 @@ public:
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const_iterator end() const { return ordering.end(); }
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const_iterator end() const { return ordering.end(); }
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};
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};
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typedef Bouquet<left_id> RoseBouquet;
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typedef Bouquet<left_id> LeftfixBouquet;
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typedef Bouquet<suffix_id> SuffixBouquet;
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typedef Bouquet<suffix_id> SuffixBouquet;
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} // namespace
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} // namespace
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@ -565,7 +565,7 @@ bool hasSameEngineType(const RoseVertexProps &u_prop,
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*
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*
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* Parameters are vectors of literals + lag pairs.
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* Parameters are vectors of literals + lag pairs.
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*
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*
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* Note: if more constaints of when the leftfixes were going to be checked
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* Note: if more constraints of when the leftfixes were going to be checked
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* (mandatory lookarounds passing, offset checks), more merges may be allowed.
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* (mandatory lookarounds passing, offset checks), more merges may be allowed.
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*/
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*/
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static
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static
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@ -599,7 +599,7 @@ bool compatibleLiteralsForMerge(
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/* An engine requires that all accesses to it are ordered by offsets. (ie,
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/* An engine requires that all accesses to it are ordered by offsets. (ie,
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we can not check an engine's state at offset Y, if we have already
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we can not check an engine's state at offset Y, if we have already
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checked its status at offset X and X > Y). If we can not establish that
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checked its status at offset X and X > Y). If we can not establish that
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the literals used for triggering will statisfy this property, then it is
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the literals used for triggering will satisfy this property, then it is
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not safe to merge the engine. */
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not safe to merge the engine. */
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for (const auto &ue : ulits) {
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for (const auto &ue : ulits) {
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const rose_literal_id &ul = *ue.first;
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const rose_literal_id &ul = *ue.first;
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@ -1778,7 +1778,7 @@ u32 estimatedAccelStates(const RoseBuildImpl &tbi, const NGHolder &h) {
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}
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}
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static
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static
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void mergeNfaLeftfixes(RoseBuildImpl &tbi, RoseBouquet &roses) {
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void mergeNfaLeftfixes(RoseBuildImpl &tbi, LeftfixBouquet &roses) {
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RoseGraph &g = tbi.g;
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RoseGraph &g = tbi.g;
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DEBUG_PRINTF("%zu nfa rose merge candidates\n", roses.size());
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DEBUG_PRINTF("%zu nfa rose merge candidates\n", roses.size());
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@ -1894,7 +1894,7 @@ void mergeSmallLeftfixes(RoseBuildImpl &tbi) {
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RoseGraph &g = tbi.g;
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RoseGraph &g = tbi.g;
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RoseBouquet nfa_roses;
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LeftfixBouquet nfa_leftfixes;
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for (auto v : vertices_range(g)) {
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for (auto v : vertices_range(g)) {
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if (!g[v].left) {
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if (!g[v].left) {
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@ -1939,20 +1939,20 @@ void mergeSmallLeftfixes(RoseBuildImpl &tbi) {
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continue;
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continue;
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}
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}
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nfa_roses.insert(left, v);
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nfa_leftfixes.insert(left, v);
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}
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}
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deque<RoseBouquet> rose_groups;
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deque<LeftfixBouquet> leftfix_groups;
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chunkBouquets(nfa_roses, rose_groups, MERGE_GROUP_SIZE_MAX);
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chunkBouquets(nfa_leftfixes, leftfix_groups, MERGE_GROUP_SIZE_MAX);
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nfa_roses.clear();
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nfa_leftfixes.clear();
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DEBUG_PRINTF("chunked nfa roses into %zu groups\n", rose_groups.size());
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DEBUG_PRINTF("chunked nfa leftfixes into %zu groups\n",
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leftfix_groups.size());
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for (auto &group : rose_groups) {
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for (auto &group : leftfix_groups) {
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mergeNfaLeftfixes(tbi, group);
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mergeNfaLeftfixes(tbi, group);
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}
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}
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}
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}
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static
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static
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void mergeCastleChunk(RoseBuildImpl &build, vector<left_id> &cands,
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void mergeCastleChunk(RoseBuildImpl &build, vector<left_id> &cands,
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insertion_ordered_map<left_id, vector<RoseVertex>> &eng_verts) {
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insertion_ordered_map<left_id, vector<RoseVertex>> &eng_verts) {
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2017, Intel Corporation
|
* Copyright (c) 2015-2018, Intel Corporation
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*
|
*
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* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
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@ -993,15 +993,19 @@ bool canImplementGraphs(const RoseBuildImpl &tbi) {
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return true;
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return true;
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}
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}
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/**
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* \brief True if there is an engine with a top that is not triggered by a
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* vertex in the Rose graph. This is a consistency check used in assertions.
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*/
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bool hasOrphanedTops(const RoseBuildImpl &build) {
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bool hasOrphanedTops(const RoseBuildImpl &build) {
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const RoseGraph &g = build.g;
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const RoseGraph &g = build.g;
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|
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unordered_map<left_id, set<u32>> roses;
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unordered_map<left_id, set<u32>> leftfixes;
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unordered_map<suffix_id, set<u32>> suffixes;
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unordered_map<suffix_id, set<u32>> suffixes;
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for (auto v : vertices_range(g)) {
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for (auto v : vertices_range(g)) {
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if (g[v].left) {
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if (g[v].left) {
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set<u32> &tops = roses[g[v].left];
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set<u32> &tops = leftfixes[g[v].left];
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if (!build.isRootSuccessor(v)) {
|
if (!build.isRootSuccessor(v)) {
|
||||||
// Tops for infixes come from the in-edges.
|
// Tops for infixes come from the in-edges.
|
||||||
for (const auto &e : in_edges_range(v, g)) {
|
for (const auto &e : in_edges_range(v, g)) {
|
||||||
@ -1014,7 +1018,7 @@ bool hasOrphanedTops(const RoseBuildImpl &build) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
for (const auto &e : roses) {
|
for (const auto &e : leftfixes) {
|
||||||
if (all_tops(e.first) != e.second) {
|
if (all_tops(e.first) != e.second) {
|
||||||
DEBUG_PRINTF("rose tops (%s) don't match rose graph (%s)\n",
|
DEBUG_PRINTF("rose tops (%s) don't match rose graph (%s)\n",
|
||||||
as_string_list(all_tops(e.first)).c_str(),
|
as_string_list(all_tops(e.first)).c_str(),
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2016-2017, Intel Corporation
|
* Copyright (c) 2016-2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
@ -280,7 +280,7 @@ void stripCheckHandledInstruction(RoseProgram &prog) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/** Returns true if the program may read the the interpreter's work_done flag */
|
/** Returns true if the program may read the interpreter's work_done flag */
|
||||||
static
|
static
|
||||||
bool reads_work_done_flag(const RoseProgram &prog) {
|
bool reads_work_done_flag(const RoseProgram &prog) {
|
||||||
for (const auto &ri : prog) {
|
for (const auto &ri : prog) {
|
||||||
@ -1837,7 +1837,7 @@ void makeRoleEagerEodReports(const RoseBuildImpl &build,
|
|||||||
program.add_before_end(move(eod_program));
|
program.add_before_end(move(eod_program));
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Makes a program for a role/vertex given a specfic pred/in_edge. */
|
/** Makes a program for a role/vertex given a specific pred/in_edge. */
|
||||||
static
|
static
|
||||||
RoseProgram makeRoleProgram(const RoseBuildImpl &build,
|
RoseProgram makeRoleProgram(const RoseBuildImpl &build,
|
||||||
const map<RoseVertex, left_build_info> &leftfix_info,
|
const map<RoseVertex, left_build_info> &leftfix_info,
|
||||||
@ -2045,7 +2045,7 @@ RoseProgram makeLiteralProgram(const RoseBuildImpl &build,
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (lit_id == build.eod_event_literal_id) {
|
if (lit_id == build.eod_event_literal_id) {
|
||||||
/* Note: does not require the lit intial program */
|
/* Note: does not require the lit initial program */
|
||||||
assert(build.eod_event_literal_id != MO_INVALID_IDX);
|
assert(build.eod_event_literal_id != MO_INVALID_IDX);
|
||||||
return role_programs;
|
return role_programs;
|
||||||
}
|
}
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2015-2017, Intel Corporation
|
* Copyright (c) 2015-2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
@ -41,7 +41,6 @@
|
|||||||
#include "rose_build.h"
|
#include "rose_build.h"
|
||||||
#include "rose_internal.h"
|
#include "rose_internal.h"
|
||||||
#include "nfa/nfa_internal.h" // for MO_INVALID_IDX
|
#include "nfa/nfa_internal.h" // for MO_INVALID_IDX
|
||||||
#include "util/charreach.h"
|
|
||||||
#include "util/depth.h"
|
#include "util/depth.h"
|
||||||
#include "util/flat_containers.h"
|
#include "util/flat_containers.h"
|
||||||
#include "util/ue2_graph.h"
|
#include "util/ue2_graph.h"
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2015-2017, Intel Corporation
|
* Copyright (c) 2015-2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
@ -27,7 +27,7 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
/** \file
|
/** \file
|
||||||
* \brief Rose Input Graph: Used for ng_rose -> rose_build_add communication.
|
* \brief Rose Input Graph: Used for ng_violet -> rose_build_add communication.
|
||||||
*
|
*
|
||||||
* The input graph MUST be a DAG.
|
* The input graph MUST be a DAG.
|
||||||
* There MUST be exactly 1 START or ANCHORED_START vertex.
|
* There MUST be exactly 1 START or ANCHORED_START vertex.
|
||||||
@ -127,7 +127,7 @@ public:
|
|||||||
flat_set<ReportID> reports; /**< for RIV_ACCEPT/RIV_ACCEPT_EOD */
|
flat_set<ReportID> reports; /**< for RIV_ACCEPT/RIV_ACCEPT_EOD */
|
||||||
u32 min_offset; /**< Minimum offset at which this vertex can match. */
|
u32 min_offset; /**< Minimum offset at which this vertex can match. */
|
||||||
u32 max_offset; /**< Maximum offset at which this vertex can match. */
|
u32 max_offset; /**< Maximum offset at which this vertex can match. */
|
||||||
size_t index = 0;
|
size_t index = 0; /**< \brief Unique vertex index. */
|
||||||
};
|
};
|
||||||
|
|
||||||
struct RoseInEdgeProps {
|
struct RoseInEdgeProps {
|
||||||
@ -176,7 +176,13 @@ struct RoseInEdgeProps {
|
|||||||
/** \brief Haig version of graph, if required. */
|
/** \brief Haig version of graph, if required. */
|
||||||
std::shared_ptr<raw_som_dfa> haig;
|
std::shared_ptr<raw_som_dfa> haig;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Distance behind the match offset for the literal in the target
|
||||||
|
* vertex that the leftfix needs to be checked at.
|
||||||
|
*/
|
||||||
u32 graph_lag;
|
u32 graph_lag;
|
||||||
|
|
||||||
|
/** \brief Unique edge index. */
|
||||||
size_t index = 0;
|
size_t index = 0;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2016-2017, Intel Corporation
|
* Copyright (c) 2016-2018, Intel Corporation
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* modification, are permitted provided that the following conditions are met:
|
||||||
@ -288,7 +288,7 @@ private:
|
|||||||
vertex_edge_list<in_edge_hook> in_edge_list;
|
vertex_edge_list<in_edge_hook> in_edge_list;
|
||||||
|
|
||||||
/* The out going edges are considered owned by the vertex and
|
/* The out going edges are considered owned by the vertex and
|
||||||
* need to be freed when the graph is begin destroyed */
|
* need to be freed when the graph is being destroyed */
|
||||||
vertex_edge_list<out_edge_hook> out_edge_list;
|
vertex_edge_list<out_edge_hook> out_edge_list;
|
||||||
|
|
||||||
/* The destructor only frees memory owned by the vertex and will leave
|
/* The destructor only frees memory owned by the vertex and will leave
|
||||||
|
Loading…
x
Reference in New Issue
Block a user