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https://github.com/VectorCamp/vectorscan.git
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FDR unflip the domain mask
The domain mask was being flipped, then unfliped, while never using the flipped state. This patch remove this unecessary flipping. Signed-off-by: Yoan Picchi <yoan.picchi@arm.com>
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@ -143,11 +143,10 @@ m128 getInitState(const struct FDR *fdr, u8 len_history, const u64a *ft,
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static really_inline
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void get_conf_stride_1(const u8 *itPtr, UNUSED const u8 *start_ptr,
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UNUSED const u8 *end_ptr, u32 domain_mask_flipped,
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UNUSED const u8 *end_ptr, uint16_t domain_mask,
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const u64a *ft, u64a *conf0, u64a *conf8, m128 *s) {
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/* +1: the zones ensure that we can read the byte at z->end */
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assert(itPtr >= start_ptr && itPtr + ITER_BYTES <= end_ptr);
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u64a domain_mask = ~domain_mask_flipped;
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u64a it_hi = *(const u64a *)itPtr;
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u64a it_lo = *(const u64a *)(itPtr + 8);
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@ -212,24 +211,24 @@ void get_conf_stride_1(const u8 *itPtr, UNUSED const u8 *start_ptr,
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static really_inline
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void get_conf_stride_2(const u8 *itPtr, UNUSED const u8 *start_ptr,
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UNUSED const u8 *end_ptr, u32 domain_mask_flipped,
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UNUSED const u8 *end_ptr, uint16_t domain_mask,
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const u64a *ft, u64a *conf0, u64a *conf8, m128 *s) {
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assert(itPtr >= start_ptr && itPtr + ITER_BYTES <= end_ptr);
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u64a reach0 = andn(domain_mask_flipped, itPtr);
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u64a reach2 = andn(domain_mask_flipped, itPtr + 2);
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u64a reach4 = andn(domain_mask_flipped, itPtr + 4);
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u64a reach6 = andn(domain_mask_flipped, itPtr + 6);
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u64a reach0 = domain_mask & *(itPtr);
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u64a reach2 = domain_mask & *(itPtr + 2);
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u64a reach4 = domain_mask & *(itPtr + 4);
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u64a reach6 = domain_mask & *(itPtr + 6);
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m128 st0 = load_m128_from_u64a(ft + reach0);
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m128 st2 = load_m128_from_u64a(ft + reach2);
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m128 st4 = load_m128_from_u64a(ft + reach4);
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m128 st6 = load_m128_from_u64a(ft + reach6);
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u64a reach8 = andn(domain_mask_flipped, itPtr + 8);
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u64a reach10 = andn(domain_mask_flipped, itPtr + 10);
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u64a reach12 = andn(domain_mask_flipped, itPtr + 12);
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u64a reach14 = andn(domain_mask_flipped, itPtr + 14);
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u64a reach8 = domain_mask & *(itPtr + 8);
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u64a reach10 = domain_mask & *(itPtr + 10);
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u64a reach12 = domain_mask & *(itPtr + 12);
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u64a reach14 = domain_mask & *(itPtr + 14);
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m128 st8 = load_m128_from_u64a(ft + reach8);
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m128 st10 = load_m128_from_u64a(ft + reach10);
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@ -265,14 +264,14 @@ void get_conf_stride_2(const u8 *itPtr, UNUSED const u8 *start_ptr,
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static really_inline
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void get_conf_stride_4(const u8 *itPtr, UNUSED const u8 *start_ptr,
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UNUSED const u8 *end_ptr, u32 domain_mask_flipped,
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UNUSED const u8 *end_ptr, uint16_t domain_mask,
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const u64a *ft, u64a *conf0, u64a *conf8, m128 *s) {
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assert(itPtr >= start_ptr && itPtr + ITER_BYTES <= end_ptr);
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u64a reach0 = andn(domain_mask_flipped, itPtr);
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u64a reach4 = andn(domain_mask_flipped, itPtr + 4);
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u64a reach8 = andn(domain_mask_flipped, itPtr + 8);
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u64a reach12 = andn(domain_mask_flipped, itPtr + 12);
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u64a reach0 = domain_mask & *(itPtr);
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u64a reach4 = domain_mask & *(itPtr + 4);
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u64a reach8 = domain_mask & *(itPtr + 8);
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u64a reach12 = domain_mask & *(itPtr + 12);
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m128 st0 = load_m128_from_u64a(ft + reach0);
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m128 st4 = load_m128_from_u64a(ft + reach4);
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@ -683,7 +682,7 @@ size_t prepareZones(const u8 *buf, size_t len, const u8 *hend,
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__builtin_prefetch(itPtr + ITER_BYTES); \
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u64a conf0; \
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u64a conf8; \
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get_conf_fn(itPtr, start_ptr, end_ptr, domain_mask_flipped, \
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get_conf_fn(itPtr, start_ptr, end_ptr, fdr->domainMask, \
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ft, &conf0, &conf8, &s); \
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do_confirm_fdr(&conf0, 0, &control, confBase, a, itPtr, \
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&last_match_id, zz); \
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@ -703,7 +702,6 @@ hwlm_error_t fdr_engine_exec(const struct FDR *fdr,
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u32 floodBackoff = FLOOD_BACKOFF_START;
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u32 last_match_id = INVALID_MATCH_ID;
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u32 domain_mask_flipped = ~fdr->domainMask;
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u8 stride = fdr->stride;
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const u64a *ft =
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(const u64a *)((const u8 *)fdr + ROUNDUP_CL(sizeof(struct FDR)));
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