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Introduce a 64-bit LimEx model.
On 64-bit platforms, the Limex 64 model is implemented in normal GPRs. On 32-bit platforms, however, 128-bit SSE registers are used for the runtime implementation.
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015, Intel Corporation
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* Copyright (c) 2015-2016, Intel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@@ -39,6 +39,16 @@
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// Runtime context structures.
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/* Note: The size of the context structures may vary from platform to platform
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* (notably, for the Limex64 structure). As a result, information based on the
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* size and other detail of these structures should not be written into the
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* bytecode -- really, the details of the structure should not be accessed by
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* the ue2 compile side at all.
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*/
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#ifdef __cplusplus
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#error ue2 runtime only file
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#endif
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/* cached_estate/esucc etc...
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*
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* If the exception state matches the cached_estate we will apply
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@@ -66,6 +76,11 @@ struct ALIGN_CL_DIRECTIVE NFAContext##nsize { \
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};
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GEN_CONTEXT_STRUCT(32, u32)
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#ifdef ARCH_64_BIT
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GEN_CONTEXT_STRUCT(64, u64a)
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#else
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GEN_CONTEXT_STRUCT(64, m128)
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#endif
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GEN_CONTEXT_STRUCT(128, m128)
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GEN_CONTEXT_STRUCT(256, m256)
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GEN_CONTEXT_STRUCT(384, m384)
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