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add arm vector types in union, avoid -flax-conversions, fix castings

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This commit is contained in:
Konstantinos Margaritis
2021-10-19 18:23:13 +00:00
committed by Konstantinos Margaritis
parent 9f7b2fa8a8
commit 5e59b36634
6 changed files with 145 additions and 93 deletions
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8
src/util/arch/arm/match.hpp
View File

@@ -30,8 +30,8 @@
template <>
really_really_inline
const u8 *firstMatch<16>(const u8 *buf, SuperVector<16> mask) {
uint32x4_t res_t = vreinterpretq_u32_u8(mask.u.v128[0]);
uint64_t vmax = vgetq_lane_u64 (vreinterpretq_u64_u32 (vpmaxq_u32(res_t, res_t)), 0);
uint32x4_t m = mask.u.u32x4[0];
uint64_t vmax = vgetq_lane_u64 (vreinterpretq_u64_u32 (vpmaxq_u32(m, m)), 0);
if (vmax != 0) {
typename SuperVector<16>::movemask_type z = mask.movemask();
DEBUG_PRINTF("z %08x\n", z);
@@ -49,8 +49,8 @@ const u8 *firstMatch<16>(const u8 *buf, SuperVector<16> mask) {
template <>
really_really_inline
const u8 *lastMatch<16>(const u8 *buf, SuperVector<16> mask) {
uint32x4_t res_t = vreinterpretq_u32_u8(mask.u.v128[0]);
uint64_t vmax = vgetq_lane_u64 (vreinterpretq_u64_u32 (vpmaxq_u32(res_t, res_t)), 0);
uint32x4_t m = mask.u.u32x4[0];
uint64_t vmax = vgetq_lane_u64 (vreinterpretq_u64_u32 (vpmaxq_u32(m, m)), 0);
if (vmax != 0) {
typename SuperVector<16>::movemask_type z = mask.movemask();
DEBUG_PRINTF("buf %p z %08x \n", buf, z);

40
src/util/arch/arm/simd_utils.h
View File

@@ -100,7 +100,7 @@ static really_inline int isnonzero128(m128 a) {
*/
static really_inline u32 diffrich128(m128 a, m128 b) {
static const uint32x4_t movemask = { 1, 2, 4, 8 };
return vaddvq_u32(vandq_u32(vmvnq_s32(vceqq_s32((int32x4_t)a, (int32x4_t)b)), movemask));
return vaddvq_u32(vandq_u32(vmvnq_u32(vceqq_u32((uint32x4_t)a, (uint32x4_t)b)), movemask));
}
/**
@@ -109,53 +109,53 @@ static really_inline u32 diffrich128(m128 a, m128 b) {
*/
static really_inline u32 diffrich64_128(m128 a, m128 b) {
static const uint64x2_t movemask = { 1, 4 };
return vaddvq_u64(vandq_u64(vmvnq_s32(vceqq_s64((int64x2_t)a, (int64x2_t)b)), movemask));
return (u32) vaddvq_u64(vandq_u64((uint64x2_t)vmvnq_u32((uint32x4_t)vceqq_u64((uint64x2_t)a, (uint64x2_t)b)), movemask));
}
static really_really_inline
m128 add_2x64(m128 a, m128 b) {
return (m128) vaddq_u64((int64x2_t)a, (int64x2_t)b);
return (m128) vaddq_u64((uint64x2_t)a, (uint64x2_t)b);
}
static really_really_inline
m128 sub_2x64(m128 a, m128 b) {
return (m128) vsubq_u64((int64x2_t)a, (int64x2_t)b);
return (m128) vsubq_u64((uint64x2_t)a, (uint64x2_t)b);
}
static really_really_inline
m128 lshift_m128(m128 a, unsigned b) {
return (m128) vshlq_n_s32((int64x2_t)a, b);
return (m128) vshlq_n_u32((uint32x4_t)a, b);
}
static really_really_inline
m128 rshift_m128(m128 a, unsigned b) {
return (m128) vshrq_n_s32((int64x2_t)a, b);
return (m128) vshrq_n_u32((uint32x4_t)a, b);
}
static really_really_inline
m128 lshift64_m128(m128 a, unsigned b) {
return (m128) vshlq_n_s64((int64x2_t)a, b);
return (m128) vshlq_n_u64((uint64x2_t)a, b);
}
static really_really_inline
m128 rshift64_m128(m128 a, unsigned b) {
return (m128) vshrq_n_s64((int64x2_t)a, b);
return (m128) vshrq_n_u64((uint64x2_t)a, b);
}
static really_inline m128 eq128(m128 a, m128 b) {
return (m128) vceqq_s8((int8x16_t)a, (int8x16_t)b);
return (m128) vceqq_u8((uint8x16_t)a, (uint8x16_t)b);
}
static really_inline m128 eq64_m128(m128 a, m128 b) {
return (m128) vceqq_u64((int64x2_t)a, (int64x2_t)b);
return (m128) vceqq_u64((uint64x2_t)a, (uint64x2_t)b);
}
static really_inline u32 movemask128(m128 a) {
static const uint8x16_t powers = { 1, 2, 4, 8, 16, 32, 64, 128, 1, 2, 4, 8, 16, 32, 64, 128 };
// Compute the mask from the input
uint64x2_t mask = vpaddlq_u32(vpaddlq_u16(vpaddlq_u8(vandq_u8((uint8x16_t)a, powers))));
uint64x2_t mask1 = (m128)vextq_s8(mask, zeroes128(), 7);
uint8x16_t mask = (uint8x16_t) vpaddlq_u32(vpaddlq_u16(vpaddlq_u8(vandq_u8((uint8x16_t)a, powers))));
uint8x16_t mask1 = vextq_u8(mask, (uint8x16_t)zeroes128(), 7);
mask = vorrq_u8(mask, mask1);
// Get the resulting bytes
@@ -187,7 +187,7 @@ static really_inline u64a movq(const m128 in) {
/* another form of movq */
static really_inline
m128 load_m128_from_u64a(const u64a *p) {
return (m128) vsetq_lane_u64(*p, zeroes128(), 0);
return (m128) vsetq_lane_u64(*p, (uint64x2_t) zeroes128(), 0);
}
static really_inline u32 extract32from128(const m128 in, unsigned imm) {
@@ -220,10 +220,10 @@ static really_inline u64a extract64from128(const m128 in, unsigned imm) {
#else
switch (imm) {
case 0:
return vgetq_lane_u64((uint32x4_t) in, 0);
return vgetq_lane_u64((uint64x2_t) in, 0);
break;
case 1:
return vgetq_lane_u64((uint32x4_t) in, 1);
return vgetq_lane_u64((uint64x2_t) in, 1);
break;
default:
return 0;
@@ -233,11 +233,11 @@ static really_inline u64a extract64from128(const m128 in, unsigned imm) {
}
static really_inline m128 low64from128(const m128 in) {
return vcombine_u64(vget_low_u64(in), vdup_n_u64(0));
return (m128) vcombine_u64(vget_low_u64((uint64x2_t)in), vdup_n_u64(0));
}
static really_inline m128 high64from128(const m128 in) {
return vcombine_u64(vget_high_u64(in), vdup_n_u64(0));
return (m128) vcombine_u64(vget_high_u64((uint64x2_t)in), vdup_n_u64(0));
}
static really_inline m128 add128(m128 a, m128 b) {
@@ -257,7 +257,7 @@ static really_inline m128 or128(m128 a, m128 b) {
}
static really_inline m128 andnot128(m128 a, m128 b) {
return (m128) (m128) vandq_s8( vmvnq_s8(a), b);
return (m128) vandq_s8( vmvnq_s8((int8x16_t) a), (int8x16_t) b);
}
// aligned load
@@ -401,12 +401,12 @@ m128 pshufb_m128(m128 a, m128 b) {
static really_inline
m128 max_u8_m128(m128 a, m128 b) {
return (m128) vmaxq_u8((int8x16_t)a, (int8x16_t)b);
return (m128) vmaxq_u8((uint8x16_t)a, (uint8x16_t)b);
}
static really_inline
m128 min_u8_m128(m128 a, m128 b) {
return (m128) vminq_u8((int8x16_t)a, (int8x16_t)b);
return (m128) vminq_u8((uint8x16_t)a, (uint8x16_t)b);
}
static really_inline