mirror of
https://github.com/VectorCamp/vectorscan.git
synced 2025-11-19 02:30:35 +03:00
WIP: Power VSX support almost completed
This commit is contained in:
Apostolos Tapsas
committed by
apostolos
apostolos
parent
28f8f30866
commit
3423ea5b2b
@@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2015-2020, Intel Corporation
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* Copyright (c) 2020-2021, VectorCamp PC
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@@ -51,8 +52,8 @@ typedef __vector int16_t int16x8_t;
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typedef __vector uint8_t uint8x16_t;
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typedef __vector int8_t int8x16_t;
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static really_inline m128 ones128(void) {
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// the value in function must be a signed literal in range -16 to 15
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return (m128) vec_splat_s8(-1);
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}
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@@ -80,14 +81,15 @@ static really_inline int isnonzero128(m128 a) {
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* mask indicating which 32-bit words contain differences.
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*/
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static really_inline u32 diffrich128(m128 a, m128 b) {
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static const m128 movemask = { 1, 2, 4, 8 };
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m128 mask = (m128) vec_cmpeq(a, b);
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mask = vec_and(vec_xor(mask, mask), movemask);
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m128 sum = vec_sums(mask, zeroes128());
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sum = vec_sld(zeroes128(), sum, 4);
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s32 ALIGN_ATTR(16) x;
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vec_ste(sum, 0, &x);
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return x;
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static const m128 movemask = { 1, 2, 4, 8 };
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m128 mask = (m128) vec_cmpeq(a, b); // _mm_cmpeq_epi32 (a, b);
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mask = vec_and(not128(mask), movemask);
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m128 sum = vec_sums(mask, zeroes128());
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//sum = vec_sld(zeroes128(), sum, 4);
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//s32 ALIGN_ATTR(16) x;
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//vec_ste(sum, 0, &x);
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//return x; // it could be ~(movemask_128(mask)) & 0x;
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return sum[3];
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}
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/**
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@@ -97,12 +99,13 @@ static really_inline u32 diffrich128(m128 a, m128 b) {
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static really_inline u32 diffrich64_128(m128 a, m128 b) {
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static const uint64x2_t movemask = { 1, 4 };
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uint64x2_t mask = (uint64x2_t) vec_cmpeq((uint64x2_t)a, (uint64x2_t)b);
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mask = vec_and(vec_xor(mask, mask), movemask);
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mask = (uint64x2_t) vec_and((uint64x2_t)not128((m128)mask), movemask);
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m128 sum = vec_sums((m128)mask, zeroes128());
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sum = vec_sld(zeroes128(), sum, 4);
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s32 ALIGN_ATTR(16) x;
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vec_ste(sum, 0, &x);
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return x;
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//sum = vec_sld(zeroes128(), sum, 4);
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//s32 ALIGN_ATTR(16) x;
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//vec_ste(sum, 0, &x);
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//return x;
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return sum[3];
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}
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static really_really_inline
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@@ -116,32 +119,59 @@ m128 sub_2x64(m128 a, m128 b) {
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}
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static really_really_inline
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m128 lshift_m128(m128 a, unsigned UNUSED b) {
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// #warning FIXME
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// b must be 4 bit literal
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return (m128) vec_sld(a, zeroes128(), 0);
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m128 lshift_m128(m128 a, unsigned b) {
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switch(b){
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case 1: return vec_sld(a, zeroes128(), 1); break;
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case 2: return vec_sld(a, zeroes128(), 2); break;
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case 3: return vec_sld(a, zeroes128(), 3); break;
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case 4: return vec_sld(a, zeroes128(), 4); break;
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case 5: return vec_sld(a, zeroes128(), 5); break;
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case 6: return vec_sld(a, zeroes128(), 6); break;
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case 7: return vec_sld(a, zeroes128(), 7); break;
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case 8: return vec_sld(a, zeroes128(), 8); break;
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case 9: return vec_sld(a, zeroes128(), 9); break;
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case 10: return vec_sld(a, zeroes128(), 10); break;
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case 11: return vec_sld(a, zeroes128(), 11); break;
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case 12: return vec_sld(a, zeroes128(), 12); break;
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case 13: return vec_sld(a, zeroes128(), 13); break;
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case 14: return vec_sld(a, zeroes128(), 14); break;
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case 15: return vec_sld(a, zeroes128(), 15); break;
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}
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return a;
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}
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static really_really_inline
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m128 rshift_m128(m128 a, unsigned UNUSED b) {
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// #warning FIXME
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// b must be 4 bit literal
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return (m128) vec_sld(zeroes128(), a, 0 - 0);
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m128 rshift_m128(m128 a, unsigned b) {
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switch(b){
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case 1: return vec_sld(zeroes128(), a, 15); break;
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case 2: return vec_sld(zeroes128(), a, 14); break;
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case 3: return vec_sld(zeroes128(), a, 13); break;
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case 4: return vec_sld(zeroes128(), a, 12); break;
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case 5: return vec_sld(zeroes128(), a, 11); break;
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case 6: return vec_sld(zeroes128(), a, 10); break;
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case 7: return vec_sld(zeroes128(), a, 9); break;
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case 8: return vec_sld(zeroes128(), a, 8); break;
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case 9: return vec_sld(zeroes128(), a, 7); break;
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case 10: return vec_sld(zeroes128(), a, 6); break;
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case 11: return vec_sld(zeroes128(), a, 5); break;
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case 12: return vec_sld(zeroes128(), a, 4); break;
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case 13: return vec_sld(zeroes128(), a, 3); break;
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case 14: return vec_sld(zeroes128(), a, 2); break;
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case 15: return vec_sld(zeroes128(), a, 1); break;
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}
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return a;
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}
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static really_really_inline
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m128 lshift64_m128(m128 a, unsigned UNUSED b) {
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// #warnint FIXME
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// b must be 4 bit literal
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return (m128) vec_sld(zeroes128(), a, 0);
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m128 lshift64_m128(m128 a, unsigned b) {
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uint64x2_t shift_indices = vec_splats((uint64_t)b);
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return (m128) vec_sl((int64x2_t)a, shift_indices);
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}
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static really_really_inline
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m128 rshift64_m128(m128 a, unsigned UNUSED b) {
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// warnint FIXME
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// b must be 4 bit literal
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return (m128) vec_sld(zeroes128(), a, 0);
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m128 rshift64_m128(m128 a, unsigned b) {
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uint64x2_t shift_indices = vec_splats((uint64_t)b);
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return (m128) vec_sr((int64x2_t)a, shift_indices);
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}
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static really_inline m128 eq128(m128 a, m128 b) {
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@@ -149,39 +179,36 @@ static really_inline m128 eq128(m128 a, m128 b) {
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}
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static really_inline m128 eq64_m128(m128 a, m128 b) {
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return (m128) vec_cmpeq((uint64x2_t)a, (uint64x2_t)b);
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return (m128) vec_cmpeq((uint64x2_t)a, (uint64x2_t)b);
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}
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static really_inline u32 movemask128(m128 a) {
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//static const uint8x16_t powers = { 1, 2, 4, 8, 16, 32, 64, 128, 1, 2, 4, 8, 16, 32, 64, 128 };
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uint8x16_t s1 = vec_sr((uint8x16_t)a, vec_splat_u8(7));
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uint16x8_t ss = vec_sr((uint16x8_t)s1, vec_splat_u16(7));
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uint16x8_t res_and = vec_and((uint16x8_t)s1, vec_splats((uint16_t)0xff));
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uint16x8_t s2 = vec_or((uint16x8_t)ss, res_and);
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// Compute the mask from the input
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//uint64x2_t mask = vpaddlq_u32(vpaddlq_u16(vpaddlq_u8(vandq_u8((uint8x16_t)a, powers))));
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//uint64x2_t mask1 = (m128)vextq_s8(mask, zeroes128(), 7);
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//mask = vorrq_u8(mask, mask1);
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uint32x4_t ss2 = vec_sr((uint32x4_t)s2, vec_splat_u32(14));
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uint32x4_t res_and2 = vec_and((uint32x4_t)s2, vec_splats((uint32_t)0xff));
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uint32x4_t s3 = vec_or((uint32x4_t)ss2, res_and2);
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// Get the resulting bytes
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//uint16_t output;
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//vst1q_lane_u16((uint16_t*)&output, (uint16x8_t)mask, 0);
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//return output;
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// #warning FIXME
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return !!diff128(a, zeroes128());
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uint64x2_t ss3 = vec_sr((uint64x2_t)s3, (uint64x2_t)vec_splats(28));
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uint64x2_t res_and3 = vec_and((uint64x2_t)s3, vec_splats((uint64_t)0xff));
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uint64x2_t s4 = vec_or((uint64x2_t)ss3, res_and3);
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uint64x2_t ss4 = vec_sld((uint64x2_t)vec_splats(0), s4, 9);
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uint64x2_t res_and4 = vec_and((uint64x2_t)ss4, vec_splats((uint64_t)0xff));
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uint64x2_t s5 = vec_or((uint64x2_t)ss4, res_and4);
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return s5[0];
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}
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static really_inline m128 set1_16x8(u8 UNUSED c) {
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// warning FIXME
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// c must be 5 bit literal
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// a solution is to use vec_splats
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//return (m128) vec_splat_u8(0);
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static really_inline m128 set1_16x8(u8 c) {
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return (m128) vec_splats(c);
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}
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static really_inline m128 set1_4x32(u32 UNUSED c) {
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// warning FIXME
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// c must be 5 bit literal
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// a solution is to use vec_splats
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// return (m128) vec_splat_u32(0);
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static really_inline m128 set1_4x32(u32 c) {
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return (m128) vec_splats(c);
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}
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@@ -196,15 +223,15 @@ static really_inline u32 movd(const m128 in) {
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}
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static really_inline u64a movq(const m128 in) {
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//return vgetq_lane_u64((uint64x2_t) in, 0);
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return !!diff128(in, zeroes128());
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// #warning FIXME
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u64a ALIGN_ATTR(16) a[2];
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vec_xst((uint64x2_t) in, 0, a);
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return a[0];
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}
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/* another form of movq */
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static really_inline
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m128 load_m128_from_u64a(const u64a *p) {
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return (m128) vec_ld(0,p);
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return (m128) vec_ld(0, p);
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}
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@@ -236,8 +263,8 @@ static really_inline u32 extract32from128(const m128 in, unsigned imm) {
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return vec_any_ne(in,lshift_m128(in,imm));
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}
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static really_inline u64a extract64from128(const m128 in, unsigned imm) {
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/*
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static really_inline u64a extract64from128(const m128 UNUSED in, unsigned UNUSED imm) {
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/* is this
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#if defined(HS_OPTIMIZE)
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return vgetq_lane_u64((uint64x2_t) in, imm);
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#else
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@@ -253,21 +280,32 @@ static really_inline u64a extract64from128(const m128 in, unsigned imm) {
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break;
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}
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#endif
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*/
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// #warning FIXME
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return vec_any_ne(in,lshift_m128(in,imm));
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*/
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/*
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u64a ALIGN_ATTR(16) a[2];
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vec_xst((uint64x2_t) in, 0, a);
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switch(imm) {
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case 0: return a[0]; break;
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case 1: return a[1]; break;
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default: return 0; break;
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}
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*/
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return 0;
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}
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static really_inline m128 low64from128(const m128 in) {
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//return vcombine_u64(vget_low_u64(in), vdup_n_u64(0));
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// #warning FIXME
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return in;
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//u64a ALIGN_ATTR(16) a[2];
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//vec_xst((uint64x2_t) in, 0, a);
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//return a[1];
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return vec_add(in, in);
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}
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static really_inline m128 high64from128(const m128 in) {
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//return vcombine_u64(vget_high_u64(in), vdup_n_u64(0));
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// #warning FIXME
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return in;
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//u64a ALIGN_ATTR(16) a[2];
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//vec_xst((uint64x2_t) in, 0, a);
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//return a[0];
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return vec_add(in, in);
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}
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@@ -288,37 +326,29 @@ static really_inline m128 or128(m128 a, m128 b) {
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}
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static really_inline m128 andnot128(m128 a, m128 b) {
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m128 and_res = and128(a,b);
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return (m128) not128(and_res);
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// or
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//return (m128) not128(and128(a,b));
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return (m128) and128(not128(a),b);
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}
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// aligned load
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static really_inline m128 load128(const void *ptr) {
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assert(ISALIGNED_N(ptr, alignof(m128)));
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//return (m128) vec_ld(0, ptr);
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// #warning FIXME
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return zeroes128();
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return (m128) vec_xl(0, (const int32_t*)ptr);
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}
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// aligned store
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static really_inline void store128(void *ptr, m128 UNUSED a) {
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static really_inline void store128(void *ptr, m128 a) {
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assert(ISALIGNED_N(ptr, alignof(m128)));
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//vec_st(a, 0, ptr);
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// warning FIXME
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vec_st(a, 0, (int32_t*)ptr);
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}
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// unaligned load
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static really_inline m128 loadu128(const void UNUSED *ptr) {
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//return (m128) vec_ld(0, ptr);
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// #warning FIXME
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return zeroes128();
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static really_inline m128 loadu128(const void *ptr) {
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return (m128) vec_xl(0, (const int64_t*)ptr);
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}
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// unaligned store
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static really_inline void storeu128(void UNUSED *ptr, m128 UNUSED a) {
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// #warning FIXME
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static really_inline void storeu128(void *ptr, m128 a) {
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vec_st(a, 0, (int32_t*)ptr);
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}
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// packed unaligned store of first N bytes
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@@ -338,11 +368,10 @@ m128 loadbytes128(const void *ptr, unsigned int n) {
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}
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//#define CASE_ALIGN_VECTORS(a, b, offset) case offset: return (m128)vextq_s8((int8x16_t)(a), (int8x16_t)(b), (offset)); break;
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#define CASE_ALIGN_VECTORS(a, b, offset) case offset: return (m128)vec_sld((int8x16_t)(b), (int8x16_t)(a), (16 - offset)); break;
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static really_really_inline
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m128 palignr_imm(m128 r, m128 l, int offset) {
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/*
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switch (offset) {
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case 0: return l; break;
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CASE_ALIGN_VECTORS(l, r, 1);
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@@ -361,56 +390,39 @@ m128 palignr_imm(m128 r, m128 l, int offset) {
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CASE_ALIGN_VECTORS(l, r, 14);
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CASE_ALIGN_VECTORS(l, r, 15);
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case 16: return r; break;
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default:
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return zeroes128();
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break;
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}
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*/
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// #warning FIXME
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return (m128) vec_cmpeq(r,lshift_m128(l,offset));
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default: return zeroes128(); break;
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}
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}
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static really_really_inline
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m128 palignr(m128 r, m128 l, int offset) {
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/*
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#if defined(HS_OPTIMIZE)
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return (m128)vextq_s8((int8x16_t)l, (int8x16_t)r, offset);
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return (m128)vec_sld((int8x16_t)l, (int8x16_t)r, offset);
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#else
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return palignr_imm(r, l, offset);
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#endif
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*/
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// #warning FIXME
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return (m128) vec_cmpeq(r, lshift_m128(l,offset));
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}
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#undef CASE_ALIGN_VECTORS
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static really_really_inline
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m128 rshiftbyte_m128(m128 a, unsigned b) {
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// #warning FIXME
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// return vec_sro(a,b);
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return rshift_m128(a,b);
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}
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static really_really_inline
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m128 lshiftbyte_m128(m128 a, unsigned b) {
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//#warning FIXME
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//return vec_slo(a,b);
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return lshift_m128(a,b);
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return lshift_m128(a,b);
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}
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static really_inline
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m128 variable_byte_shift_m128(m128 in, s32 amount) {
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/*
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assert(amount >= -16 && amount <= 16);
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static const uint8x16_t vbs_mask = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f };
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const uint8x16_t outside_mask = set1_16x8(0xf0);
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m128 shift_mask = palignr_imm(vbs_mask, outside_mask, 16 - amount);
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return vqtbl1q_s8(in, shift_mask);
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*/
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// #warning FIXME
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return lshift_m128(in,amount);
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if (amount < 0){
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return palignr_imm(zeroes128(), in, -amount);
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} else{
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return palignr_imm(in, zeroes128(), 16 - amount);
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}
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}
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#ifdef __cplusplus
|
||||
@@ -450,28 +462,22 @@ char testbit128(m128 val, unsigned int n) {
|
||||
|
||||
static really_inline
|
||||
m128 pshufb_m128(m128 a, m128 b) {
|
||||
/* On Intel, if bit 0x80 is set, then result is zero, otherwise which the lane it is &0xf.
|
||||
In NEON, if >=16, then the result is zero, otherwise it is that lane.
|
||||
btranslated is the version that is converted from Intel to NEON. */
|
||||
//int8x16_t btranslated = vandq_s8((int8x16_t)b,vdupq_n_s8(0x8f));
|
||||
//return (m128)vqtbl1q_s8((int8x16_t)a, (uint8x16_t)btranslated);
|
||||
// #warning FIXME
|
||||
return (m128) vec_max((int8x16_t)a, (int8x16_t)b);
|
||||
return (m128) vec_permxor((int8x16_t)vec_splat_s8(0), (int8x16_t)a, (int8x16_t)b);
|
||||
}
|
||||
|
||||
static really_inline
|
||||
m128 max_u8_m128(m128 a, m128 b) {
|
||||
return (m128) vec_max((int8x16_t)a, (int8x16_t)b);
|
||||
return (m128) vec_max((uint8x16_t)a, (uint8x16_t)b);
|
||||
}
|
||||
|
||||
static really_inline
|
||||
m128 min_u8_m128(m128 a, m128 b) {
|
||||
return (m128) vec_min((int8x16_t)a, (int8x16_t)b);
|
||||
return (m128) vec_min((uint8x16_t)a, (uint8x16_t)b);
|
||||
}
|
||||
|
||||
static really_inline
|
||||
m128 sadd_u8_m128(m128 a, m128 b) {
|
||||
return (m128) vec_add((uint8x16_t)a, (uint8x16_t)b);
|
||||
return (m128) vec_adds((uint8x16_t)a, (uint8x16_t)b);
|
||||
}
|
||||
|
||||
static really_inline
|
||||
@@ -480,19 +486,15 @@ m128 sub_u8_m128(m128 a, m128 b) {
|
||||
}
|
||||
|
||||
static really_inline
|
||||
m128 set4x32(u32 UNUSED x3, u32 UNUSED x2, u32 UNUSED x1, u32 UNUSED x0) {
|
||||
//uint32_t ALIGN_ATTR(16) data[4] = { x0, x1, x2, x3 };
|
||||
//return (m128) vec_splat_u32(data);
|
||||
// #warning FIXME
|
||||
return zeroes128();
|
||||
m128 set4x32(u32 x3, u32 x2, u32 x1, u32 x0) {
|
||||
uint32x4_t v = { x0, x1, x2, x3 };
|
||||
return (m128) v;
|
||||
}
|
||||
|
||||
static really_inline
|
||||
m128 set2x64(u64a UNUSED hi, u64a UNUSED lo) {
|
||||
//uint64_t ALIGN_ATTR(16) data[2] = { lo, hi };
|
||||
//return (m128) vec_splats(data);
|
||||
// #warning FIXME
|
||||
return zeroes128();
|
||||
m128 set2x64(u64a hi, u64a lo) {
|
||||
uint64x2_t v = { lo, hi };
|
||||
return (m128) v;
|
||||
}
|
||||
|
||||
#endif // ARCH_PPC64EL_SIMD_UTILS_H
|
||||
|
||||
Reference in New Issue
Block a user