mirror of
https://github.com/VectorCamp/vectorscan.git
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fix SIMDe emulation builds on Arm, add native translation from x86 for comparison
This commit is contained in:
Konstantinos Margaritis
committed by
Konstantinos Margaritis
Konstantinos Margaritis
parent
b0d9c7f879
commit
1fb601f3a9
@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2015-2020, Intel Corporation
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* Copyright (c) 2020-2021, VectorCamp PC
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* Copyright (c) 2020-2023, VectorCamp PC
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@@ -41,7 +41,7 @@
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#include <string.h> // for memcpy
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#if !defined(HAVE_SIMD_128_BITS) && !defined(SIMDE_BACKEND)
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#if !defined(HAVE_SIMD_128_BITS) && !defined(VS_SIMDE_BACKEND)
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#error "You need at least a 128-bit capable SIMD engine!"
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#endif // HAVE_SIMD_128_BITS
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@@ -88,7 +88,7 @@ static inline void print_m128_2x64(const char *label, m128 vec) {
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#define print_m128_2x64(label, vec) ;
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#endif
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#if !defined(ARCH_IA32) && !defined(ARCH_X86_64) && !defined(SIMDE_BACKEND)
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#if !defined(ARCH_IA32) && !defined(ARCH_X86_64) && !defined(VS_SIMDE_BACKEND)
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#define ZEROES_8 0, 0, 0, 0, 0, 0, 0, 0
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#define ZEROES_31 ZEROES_8, ZEROES_8, ZEROES_8, 0, 0, 0, 0, 0, 0, 0
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#define ZEROES_32 ZEROES_8, ZEROES_8, ZEROES_8, ZEROES_8
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@@ -1,388 +0,0 @@
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/*
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* Copyright (c) 2015-2020, Intel Corporation
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* Copyright (c) 2020-2021, VectorCamp PC
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Intel Corporation nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/** \file
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* \brief SIMD types and primitive operations.
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*/
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#ifndef ARCH_SIMDE_SIMD_UTILS_H
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#define ARCH_SIMDE_SIMD_UTILS_H
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#include "ue2common.h"
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#include "util/simd_types.h"
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#include "util/unaligned.h"
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#include "util/intrinsics.h"
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#include <string.h> // for memcpy
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#define ZEROES_8 0, 0, 0, 0, 0, 0, 0, 0
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#define ZEROES_31 ZEROES_8, ZEROES_8, ZEROES_8, 0, 0, 0, 0, 0, 0, 0
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#define ZEROES_32 ZEROES_8, ZEROES_8, ZEROES_8, ZEROES_8
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/** \brief LUT for the mask1bit functions. */
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ALIGN_CL_DIRECTIVE static const u8 simd_onebit_masks[] = {
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ZEROES_32, ZEROES_32,
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ZEROES_31, 0x01, ZEROES_32,
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ZEROES_31, 0x02, ZEROES_32,
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ZEROES_31, 0x04, ZEROES_32,
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ZEROES_31, 0x08, ZEROES_32,
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ZEROES_31, 0x10, ZEROES_32,
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ZEROES_31, 0x20, ZEROES_32,
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ZEROES_31, 0x40, ZEROES_32,
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ZEROES_31, 0x80, ZEROES_32,
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ZEROES_32, ZEROES_32,
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};
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static really_inline m128 ones128(void) {
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return (m128) _mm_set1_epi8(0xFF);
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}
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static really_inline m128 zeroes128(void) {
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return (m128) _mm_setzero_si128();
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}
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/** \brief Bitwise not for m128*/
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static really_inline m128 not128(m128 a) {
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return (m128) _mm_xor_si128(a, ones128());
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}
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/** \brief Return 1 if a and b are different otherwise 0 */
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static really_inline int diff128(m128 a, m128 b) {
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return (_mm_movemask_epi8(_mm_cmpeq_epi8(a, b)) ^ 0xffff);
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}
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static really_inline int isnonzero128(m128 a) {
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return !!diff128(a, zeroes128());
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}
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/**
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* "Rich" version of diff128(). Takes two vectors a and b and returns a 4-bit
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* mask indicating which 32-bit words contain differences.
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*/
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static really_inline u32 diffrich128(m128 a, m128 b) {
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a = _mm_cmpeq_epi32(a, b);
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return ~(_mm_movemask_ps(_mm_castsi128_ps(a))) & 0xf;
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}
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/**
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* "Rich" version of diff128(), 64-bit variant. Takes two vectors a and b and
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* returns a 4-bit mask indicating which 64-bit words contain differences.
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*/
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static really_inline u32 diffrich64_128(m128 a, m128 b) {
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a = _mm_cmpeq_epi64(a, b);
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return ~(_mm_movemask_ps(_mm_castsi128_ps(a))) & 0x5;
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}
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static really_really_inline
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m128 add_2x64(m128 a, m128 b) {
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return (m128) _mm_add_epi64(a, b);
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}
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static really_really_inline
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m128 sub_2x64(m128 a, m128 b) {
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return (m128) _mm_sub_epi64(a, b);
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}
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static really_really_inline
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m128 lshift64_m128(m128 a, unsigned b) {
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return _mm_slli_epi64(a, b);
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}
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#define rshift64_m128(a, b) _mm_srli_epi64((a), (b))
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#define eq128(a, b) _mm_cmpeq_epi8((a), (b))
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#define eq64_m128(a, b) _mm_cmpeq_epi64((a), (b))
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#define movemask128(a) ((u32)_mm_movemask_epi8((a)))
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static really_inline m128 set1_16x8(u8 c) {
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return _mm_set1_epi8(c);
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}
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static really_inline m128 set1_4x32(u32 c) {
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return _mm_set1_epi32(c);
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}
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static really_inline m128 set1_2x64(u64a c) {
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return _mm_set1_epi64x(c);
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}
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static really_inline u32 movd(const m128 in) {
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return _mm_cvtsi128_si32(in);
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}
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static really_inline u64a movq(const m128 in) {
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return _mm_cvtsi128_si64(in);
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}
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/* another form of movq */
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static really_inline
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m128 load_m128_from_u64a(const u64a *p) {
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return _mm_set_epi64x(0LL, *p);
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}
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#define CASE_RSHIFT_VECTOR(a, count) case count: return _mm_srli_si128((m128)(a), (count)); break;
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static really_inline
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m128 rshiftbyte_m128(const m128 a, int count_immed) {
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switch (count_immed) {
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case 0: return a; break;
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CASE_RSHIFT_VECTOR(a, 1);
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CASE_RSHIFT_VECTOR(a, 2);
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CASE_RSHIFT_VECTOR(a, 3);
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CASE_RSHIFT_VECTOR(a, 4);
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CASE_RSHIFT_VECTOR(a, 5);
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CASE_RSHIFT_VECTOR(a, 6);
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CASE_RSHIFT_VECTOR(a, 7);
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CASE_RSHIFT_VECTOR(a, 8);
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CASE_RSHIFT_VECTOR(a, 9);
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CASE_RSHIFT_VECTOR(a, 10);
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CASE_RSHIFT_VECTOR(a, 11);
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CASE_RSHIFT_VECTOR(a, 12);
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CASE_RSHIFT_VECTOR(a, 13);
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CASE_RSHIFT_VECTOR(a, 14);
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CASE_RSHIFT_VECTOR(a, 15);
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default: return zeroes128(); break;
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}
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}
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#undef CASE_RSHIFT_VECTOR
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#define CASE_LSHIFT_VECTOR(a, count) case count: return _mm_slli_si128((m128)(a), (count)); break;
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static really_inline
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m128 lshiftbyte_m128(const m128 a, int count_immed) {
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switch (count_immed) {
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case 0: return a; break;
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CASE_LSHIFT_VECTOR(a, 1);
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CASE_LSHIFT_VECTOR(a, 2);
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CASE_LSHIFT_VECTOR(a, 3);
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CASE_LSHIFT_VECTOR(a, 4);
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CASE_LSHIFT_VECTOR(a, 5);
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CASE_LSHIFT_VECTOR(a, 6);
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CASE_LSHIFT_VECTOR(a, 7);
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CASE_LSHIFT_VECTOR(a, 8);
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CASE_LSHIFT_VECTOR(a, 9);
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CASE_LSHIFT_VECTOR(a, 10);
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CASE_LSHIFT_VECTOR(a, 11);
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CASE_LSHIFT_VECTOR(a, 12);
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CASE_LSHIFT_VECTOR(a, 13);
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CASE_LSHIFT_VECTOR(a, 14);
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CASE_LSHIFT_VECTOR(a, 15);
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default: return zeroes128(); break;
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}
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}
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#undef CASE_LSHIFT_VECTOR
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#define extract32from128(a, imm) _mm_extract_epi32(a, imm)
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#define extract64from128(a, imm) _mm_extract_epi64(a, imm)
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static really_inline m128 add128(m128 a, m128 b) {
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return _mm_add_epi64(a, b);
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}
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static really_inline m128 and128(m128 a, m128 b) {
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return _mm_and_si128(a,b);
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}
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static really_inline m128 xor128(m128 a, m128 b) {
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return _mm_xor_si128(a,b);
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}
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static really_inline m128 or128(m128 a, m128 b) {
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return _mm_or_si128(a,b);
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}
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static really_inline m128 andnot128(m128 a, m128 b) {
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return _mm_andnot_si128(a, b);
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}
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// aligned load
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static really_inline m128 load128(const void *ptr) {
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assert(ISALIGNED_N(ptr, alignof(m128)));
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ptr = vectorscan_assume_aligned(ptr, 16);
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return _mm_load_si128((const m128 *)ptr);
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}
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// aligned store
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static really_inline void store128(void *ptr, m128 a) {
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assert(ISALIGNED_N(ptr, alignof(m128)));
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ptr = vectorscan_assume_aligned(ptr, 16);
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*(m128 *)ptr = a;
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}
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// unaligned load
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static really_inline m128 loadu128(const void *ptr) {
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return _mm_loadu_si128((const m128 *)ptr);
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}
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// unaligned store
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static really_inline void storeu128(void *ptr, m128 a) {
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_mm_storeu_si128 ((m128 *)ptr, a);
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}
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// packed unaligned store of first N bytes
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static really_inline
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void storebytes128(void *ptr, m128 a, unsigned int n) {
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assert(n <= sizeof(a));
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memcpy(ptr, &a, n);
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}
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// packed unaligned load of first N bytes, pad with zero
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static really_inline
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m128 loadbytes128(const void *ptr, unsigned int n) {
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m128 a = zeroes128();
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assert(n <= sizeof(a));
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memcpy(&a, ptr, n);
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return a;
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}
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static really_inline
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m128 mask1bit128(unsigned int n) {
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assert(n < sizeof(m128) * 8);
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u32 mask_idx = ((n % 8) * 64) + 95;
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mask_idx -= n / 8;
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return loadu128(&simd_onebit_masks[mask_idx]);
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}
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// switches on bit N in the given vector.
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static really_inline
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void setbit128(m128 *ptr, unsigned int n) {
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*ptr = or128(mask1bit128(n), *ptr);
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}
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// switches off bit N in the given vector.
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static really_inline
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void clearbit128(m128 *ptr, unsigned int n) {
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*ptr = andnot128(mask1bit128(n), *ptr);
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}
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// tests bit N in the given vector.
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static really_inline
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char testbit128(m128 val, unsigned int n) {
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const m128 mask = mask1bit128(n);
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#if defined(HAVE_SSE41)
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return !_mm_testz_si128(mask, val);
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#else
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return isnonzero128(and128(mask, val));
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#endif
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}
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// offset must be an immediate
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#define palignr_imm(r, l, offset) _mm_alignr_epi8(r, l, offset)
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static really_inline
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m128 pshufb_m128(m128 a, m128 b) {
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return _mm_shuffle_epi8(a, b);
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}
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#define CASE_ALIGN_VECTORS(a, b, offset) case offset: return palignr_imm((m128)(a), (m128)(b), (offset)); break;
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static really_really_inline
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m128 palignr_sw(m128 r, m128 l, int offset) {
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switch (offset) {
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case 0: return l; break;
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CASE_ALIGN_VECTORS(r, l, 1);
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CASE_ALIGN_VECTORS(r, l, 2);
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CASE_ALIGN_VECTORS(r, l, 3);
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CASE_ALIGN_VECTORS(r, l, 4);
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CASE_ALIGN_VECTORS(r, l, 5);
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CASE_ALIGN_VECTORS(r, l, 6);
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CASE_ALIGN_VECTORS(r, l, 7);
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CASE_ALIGN_VECTORS(r, l, 8);
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CASE_ALIGN_VECTORS(r, l, 9);
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CASE_ALIGN_VECTORS(r, l, 10);
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CASE_ALIGN_VECTORS(r, l, 11);
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CASE_ALIGN_VECTORS(r, l, 12);
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CASE_ALIGN_VECTORS(r, l, 13);
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CASE_ALIGN_VECTORS(r, l, 14);
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CASE_ALIGN_VECTORS(r, l, 15);
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case 16: return r; break;
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default:
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return zeroes128();
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break;
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}
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}
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#undef CASE_ALIGN_VECTORS
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static really_really_inline
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m128 palignr(m128 r, m128 l, int offset) {
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#if defined(HAVE__BUILTIN_CONSTANT_P)
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if (__builtin_constant_p(offset)) {
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return palignr_imm(r, l, offset);
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}
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#endif
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return palignr_sw(r, l, offset);
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}
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static really_inline
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m128 variable_byte_shift_m128(m128 in, s32 amount) {
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assert(amount >= -16 && amount <= 16);
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if (amount < 0) {
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return palignr(zeroes128(), in, -amount);
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} else {
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return palignr(in, zeroes128(), 16 - amount);
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}
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}
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/*
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static really_inline
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m128 variable_byte_shift_m128(m128 in, s32 amount) {
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assert(amount >= -16 && amount <= 16);
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m128 shift_mask = loadu128(vbs_mask_data + 16 - amount);
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return pshufb_m128(in, shift_mask);
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}*/
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static really_inline
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m128 max_u8_m128(m128 a, m128 b) {
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return _mm_max_epu8(a, b);
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}
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static really_inline
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m128 min_u8_m128(m128 a, m128 b) {
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return _mm_min_epu8(a, b);
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}
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static really_inline
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m128 sadd_u8_m128(m128 a, m128 b) {
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return _mm_adds_epu8(a, b);
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}
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static really_inline
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m128 sub_u8_m128(m128 a, m128 b) {
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return _mm_sub_epi8(a, b);
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}
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static really_inline
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m128 set4x32(u32 x3, u32 x2, u32 x1, u32 x0) {
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return _mm_set_epi32(x3, x2, x1, x0);
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}
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static really_inline
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m128 set2x64(u64a hi, u64a lo) {
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return _mm_set_epi64x(hi, lo);
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}
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#endif // ARCH_SIMDE_SIMD_UTILS_H
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@@ -112,6 +112,16 @@ static really_inline u32 diffrich64_128(m128 a, m128 b) {
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#endif
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}
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static really_really_inline
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m128 add_2x64(m128 a, m128 b) {
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return (m128) _mm_add_epi64(a, b);
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}
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static really_really_inline
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m128 sub_2x64(m128 a, m128 b) {
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return (m128) _mm_sub_epi64(a, b);
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}
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static really_really_inline
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m128 lshift64_m128(m128 a, unsigned b) {
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||||
#if defined(HAVE__BUILTIN_CONSTANT_P)
|
||||
@@ -124,8 +134,9 @@ m128 lshift64_m128(m128 a, unsigned b) {
|
||||
}
|
||||
|
||||
#define rshift64_m128(a, b) _mm_srli_epi64((a), (b))
|
||||
#define eq128(a, b) _mm_cmpeq_epi8((a), (b))
|
||||
#define movemask128(a) ((u32)_mm_movemask_epi8((a)))
|
||||
#define eq128(a, b) _mm_cmpeq_epi8((a), (b))
|
||||
#define eq64_m128(a, b) _mm_cmpeq_epi64((a), (b))
|
||||
#define movemask128(a) ((u32)_mm_movemask_epi8((a)))
|
||||
|
||||
#if defined(HAVE_AVX512)
|
||||
static really_inline m128 cast512to128(const m512 in) {
|
||||
@@ -668,24 +679,6 @@ m256 combine2x128(m128 hi, m128 lo) {
|
||||
}
|
||||
#endif //AVX2
|
||||
|
||||
#if defined(HAVE_SIMD_128_BITS)
|
||||
/**
|
||||
* "Rich" version of diff384(). Takes two vectors a and b and returns a 12-bit
|
||||
* mask indicating which 32-bit words contain differences.
|
||||
*/
|
||||
|
||||
static really_inline u32 diffrich384(m384 a, m384 b) {
|
||||
m128 z = zeroes128();
|
||||
a.lo = _mm_cmpeq_epi32(a.lo, b.lo);
|
||||
a.mid = _mm_cmpeq_epi32(a.mid, b.mid);
|
||||
a.hi = _mm_cmpeq_epi32(a.hi, b.hi);
|
||||
m128 packed = _mm_packs_epi16(_mm_packs_epi32(a.lo, a.mid),
|
||||
_mm_packs_epi32(a.hi, z));
|
||||
return ~(_mm_movemask_epi8(packed)) & 0xfff;
|
||||
}
|
||||
|
||||
#endif // HAVE_SIMD_128_BITS
|
||||
|
||||
/****
|
||||
**** 512-bit Primitives
|
||||
****/
|
||||
|
||||
Reference in New Issue
Block a user