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https://github.com/VectorCamp/vectorscan.git
synced 2025-06-28 16:41:01 +03:00
rose: clean up nfa state alloc
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parent
246f9f4f86
commit
10aa806d67
@ -2105,16 +2105,14 @@ bool buildNfas(RoseBuildImpl &tbi, build_context &bc, QueueIndexFactory &qif,
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}
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static
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void allocateStateSpace(const NFA *nfa, const set<u32> &transient_queues,
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RoseStateOffsets *so, NfaInfo *nfa_infos,
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u32 *currFullStateSize, u32 *maskStateSize,
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u32 *tStateSize) {
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u32 qi = nfa->queueIndex;
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bool transient = transient_queues.find(qi) != transient_queues.end();
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u32 stateSize = verify_u32(nfa->streamStateSize);
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void allocateStateSpace(const NFA *nfa, NfaInfo *nfa_info, bool is_transient,
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RoseStateOffsets *so, u32 *currFullStateSize,
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u32 *maskStateSize, u32 *tStateSize) {
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const u32 stateSize = nfa->streamStateSize;
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const u32 scratchStateSize = nfa->scratchStateSize;
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u32 state_offset;
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if (transient) {
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if (is_transient) {
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state_offset = *tStateSize;
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*tStateSize += stateSize;
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} else {
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@ -2124,29 +2122,30 @@ void allocateStateSpace(const NFA *nfa, const set<u32> &transient_queues,
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*maskStateSize += stateSize;
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}
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nfa_infos[qi].stateOffset = state_offset;
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nfa_info->stateOffset = state_offset;
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// Uncompressed state must be aligned.
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u32 scratchStateSize = verify_u32(nfa->scratchStateSize);
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u32 alignReq = state_alignment(*nfa);
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assert(alignReq);
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while (*currFullStateSize % alignReq) {
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(*currFullStateSize)++;
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}
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nfa_infos[qi].fullStateOffset = *currFullStateSize;
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nfa_info->fullStateOffset = *currFullStateSize;
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*currFullStateSize += scratchStateSize;
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}
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static
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void findTransientQueues(const map<RoseVertex, left_build_info> &leftfix_info,
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set<u32> *out) {
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set<u32>
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findTransientQueues(const map<RoseVertex, left_build_info> &leftfix_info) {
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DEBUG_PRINTF("curating transient queues\n");
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for (const auto &build : leftfix_info | map_values) {
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if (build.transient) {
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DEBUG_PRINTF("q %u is transient\n", build.queue);
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out->insert(build.queue);
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set<u32> out;
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for (const auto &left : leftfix_info | map_values) {
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if (left.transient) {
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DEBUG_PRINTF("q %u is transient\n", left.queue);
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out.insert(left.queue);
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}
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}
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return out;
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}
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static
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@ -2167,12 +2166,14 @@ void updateNfaState(const build_context &bc, RoseEngine &proto,
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*tStateSize = 0;
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*fullStateSize = 0;
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set<u32> transient_queues;
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findTransientQueues(bc.leftfix_info, &transient_queues);
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auto transient_queues = findTransientQueues(bc.leftfix_info);
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for (const auto &m : bc.engineOffsets) {
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const NFA *n = get_nfa_from_blob(bc, m.first);
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allocateStateSpace(n, transient_queues, so, nfa_infos, fullStateSize,
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const NFA *nfa = get_nfa_from_blob(bc, m.first);
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u32 qi = nfa->queueIndex;
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bool is_transient = contains(transient_queues, qi);
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NfaInfo *nfa_info = &nfa_infos[qi];
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allocateStateSpace(nfa, nfa_info, is_transient, so, fullStateSize,
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nfaStateSize, tStateSize);
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}
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}
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