remove Windows/ICC support

This commit is contained in:
Konstantinos Margaritis
2021-07-30 12:49:38 +03:00
committed by Konstantinos Margaritis
parent 8cff876962
commit 08357a096c
41 changed files with 94 additions and 892 deletions

View File

@@ -353,12 +353,6 @@ hs_error_t dbIsValid(const hs_database_t *db) {
return HS_SUCCESS;
}
#if defined(_WIN32)
#define SNPRINTF_COMPAT _snprintf
#else
#define SNPRINTF_COMPAT snprintf
#endif
/** Allocate a buffer and prints the database info into it. Returns an
* appropriate error code on failure, or HS_SUCCESS on success. */
static
@@ -400,9 +394,7 @@ hs_error_t print_database_string(char **s, u32 version, const platform_t plat,
return ret;
}
// Note: SNPRINTF_COMPAT is a macro defined above, to cope with systems
// that don't have snprintf but have a workalike.
int p_len = SNPRINTF_COMPAT(
int p_len = snprintf(
buf, len, "Version: %u.%u.%u Features: %s Mode: %s",
major, minor, release, features, mode);
if (p_len < 0) {

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@@ -29,11 +29,7 @@
#ifndef HS_COMMON_H_
#define HS_COMMON_H_
#if defined(_WIN32)
#define HS_CDECL __cdecl
#else
#define HS_CDECL
#endif
#include <stdlib.h>
/**

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@@ -242,7 +242,6 @@ int isMultiTopType(u8 t) {
/** Macros used in place of unimplemented NFA API functions for a given
* engine. */
#if !defined(_WIN32)
/* Use for functions that return an integer. */
#define NFA_API_NO_IMPL(...) \
@@ -258,14 +257,6 @@ int isMultiTopType(u8 t) {
NFA_ZOMBIE_NO; \
})
#else
/* Simpler implementation for compilers that don't like the GCC extension used
* above. */
#define NFA_API_NO_IMPL(...) 0
#define NFA_API_ZOMBIE_NO_IMPL(...) NFA_ZOMBIE_NO
#endif
#ifdef __cplusplus
}

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@@ -2116,7 +2116,6 @@ hwlmcb_rv_t checkPurelyNegatives(const struct RoseEngine *t,
return HWLM_CONTINUE_MATCHING;
}
#if !defined(_WIN32)
#define PROGRAM_CASE(name) \
case ROSE_INSTR_##name: { \
LABEL_ROSE_INSTR_##name: \
@@ -2132,21 +2131,6 @@ hwlmcb_rv_t checkPurelyNegatives(const struct RoseEngine *t,
#define PROGRAM_NEXT_INSTRUCTION_JUMP \
goto *(next_instr[*(const u8 *)pc]);
#else
#define PROGRAM_CASE(name) \
case ROSE_INSTR_##name: { \
DEBUG_PRINTF("instruction: " #name " (pc=%u)\n", \
programOffset + (u32)(pc - pc_base)); \
const struct ROSE_STRUCT_##name *ri = \
(const struct ROSE_STRUCT_##name *)pc;
#define PROGRAM_NEXT_INSTRUCTION \
pc += ROUNDUP_N(sizeof(*ri), ROSE_INSTR_MIN_ALIGN); \
break; \
}
#define PROGRAM_NEXT_INSTRUCTION_JUMP continue;
#endif
hwlmcb_rv_t roseRunProgram(const struct RoseEngine *t,
struct hs_scratch *scratch, u32 programOffset,
@@ -2178,7 +2162,6 @@ hwlmcb_rv_t roseRunProgram(const struct RoseEngine *t,
assert(*(const u8 *)pc != ROSE_INSTR_END);
#if !defined(_WIN32)
static const void *next_instr[] = {
&&LABEL_ROSE_INSTR_END, //!< End of program.
&&LABEL_ROSE_INSTR_ANCHORED_DELAY, //!< Delay until after anchored matcher.
@@ -2254,7 +2237,6 @@ hwlmcb_rv_t roseRunProgram(const struct RoseEngine *t,
&&LABEL_ROSE_INSTR_CHECK_MASK_64 //!< 64-bytes and/cmp/neg mask check.
#endif
};
#endif
for (;;) {
assert(ISALIGNED_N(pc, ROSE_INSTR_MIN_ALIGN));

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@@ -1437,19 +1437,7 @@ void mergeLeftfixesVariableLag(RoseBuildImpl &build) {
assert(!parents.empty());
#ifndef _WIN32
engine_groups[MergeKey(left, parents)].emplace_back(left);
#else
// On windows, when passing MergeKey object into map 'engine_groups',
// it will not be copied, but will be freed along with
// engine_groups.clear().
// If we construct MergeKey object on the stack, it will be destructed
// on its life cycle ending, then on engine_groups.clear(), which
// will cause is_block_type_valid() assertion error in MergeKey
// destructor.
MergeKey *mk = new MergeKey(left, parents);
engine_groups[*mk].emplace_back(left);
#endif
}
vector<vector<left_id>> chunks;

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@@ -45,12 +45,7 @@
// stdint.h for things like uintptr_t and friends
#include <stdint.h>
/* ick */
#if defined(_WIN32)
#define ALIGN_ATTR(x) __declspec(align(x))
#else
#define ALIGN_ATTR(x) __attribute__((aligned((x))))
#endif
#define ALIGN_DIRECTIVE ALIGN_ATTR(16)
#define ALIGN_AVX_DIRECTIVE ALIGN_ATTR(32)
@@ -66,13 +61,8 @@ typedef signed int s32;
/* We append the 'a' for aligned, since these aren't common, garden variety
* 64 bit values. The alignment is necessary for structs on some platforms,
* so we don't end up performing accidental unaligned accesses. */
#if defined(_WIN32) && ! defined(_WIN64)
typedef unsigned long long ALIGN_ATTR(4) u64a;
typedef signed long long ALIGN_ATTR(4) s64a;
#else
typedef unsigned long long ALIGN_ATTR(8) u64a;
typedef signed long long ALIGN_ATTR(8) s64a;
#endif
/* get the SIMD types */
#include "util/simd_types.h"
@@ -83,24 +73,14 @@ typedef u32 ReportID;
/* Shorthand for attribute to mark a function as part of our public API.
* Functions without this attribute will be hidden. */
#if !defined(_WIN32)
#define HS_PUBLIC_API __attribute__((visibility("default")))
#else
// TODO: dllexport defines for windows
#define HS_PUBLIC_API
#endif
#define ARRAY_LENGTH(a) (sizeof(a)/sizeof((a)[0]))
/** \brief Shorthand for the attribute to shut gcc about unused parameters */
#if !defined(_WIN32)
#define UNUSED __attribute__ ((unused))
#else
#define UNUSED
#endif
/* really_inline forces inlining always */
#if !defined(_WIN32)
#if defined(HS_OPTIMIZE)
#define really_inline inline __attribute__ ((always_inline, unused))
#else
@@ -113,33 +93,9 @@ typedef u32 ReportID;
#define alignof __alignof
#define HAVE_TYPEOF 1
#else // ms windows
#define really_inline __forceinline
#define really_really_inline __forceinline
#define never_inline
#define __builtin_prefetch(...) do {} while(0)
#if defined(__cplusplus)
#define __typeof__ decltype
#define HAVE_TYPEOF 1
#else // C
/* msvc doesn't have decltype or typeof in C */
#define inline __inline
#define alignof __alignof
#endif
#endif
// We use C99-style "restrict".
#ifdef _WIN32
#ifdef __cplusplus
#define restrict
#else
#define restrict __restrict
#endif
#else
#define restrict __restrict
#endif
// Align to 16-byte boundary
#define ROUNDUP_16(a) (((a) + 0xf) & ~0xf)
@@ -186,25 +142,16 @@ typedef u32 ReportID;
#define LIMIT_TO_AT_MOST(a, b) (*(a) = MIN(*(a),(b)))
#define ENSURE_AT_LEAST(a, b) (*(a) = MAX(*(a),(b)))
#ifndef _WIN32
#ifndef likely
#define likely(x) __builtin_expect(!!(x), 1)
#endif
#ifndef unlikely
#define unlikely(x) __builtin_expect(!!(x), 0)
#endif
#else
#define likely(x) (x)
#define unlikely(x) (x)
#endif
#if !defined(RELEASE_BUILD) || defined(DEBUG)
#ifdef _WIN32
#define PATH_SEP '\\'
#else
#define PATH_SEP '/'
#endif
#endif
#if defined(DEBUG) && !defined(DEBUG_PRINTF)
#include <string.h>

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@@ -61,20 +61,12 @@ namespace ue2 {
void *aligned_malloc_internal(size_t size, size_t align) {
void *mem;
#if !defined(_WIN32)
int rv = posix_memalign(&mem, align, size);
if (rv != 0) {
DEBUG_PRINTF("posix_memalign returned %d when asked for %zu bytes\n",
rv, size);
return nullptr;
}
#else
if (nullptr == (mem = _aligned_malloc(size, align))) {
DEBUG_PRINTF("_aligned_malloc failed when asked for %zu bytes\n",
size);
return nullptr;
}
#endif
assert(mem);
return mem;
@@ -85,11 +77,7 @@ void aligned_free_internal(void *ptr) {
return;
}
#if defined(_WIN32)
_aligned_free(ptr);
#else
free(ptr);
#endif
}
/** \brief 64-byte aligned, zeroed malloc.

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@@ -31,7 +31,7 @@
#include "ue2common.h"
#if (defined(ARCH_IA32) || defined(ARCH_X86_64)) && !defined(_WIN32) && !defined(CPUID_H_)
#if (defined(ARCH_IA32) || defined(ARCH_X86_64)) && !defined(CPUID_H_)
#include <cpuid.h>
/* system header doesn't have a header guard */
#define CPUID_H_

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@@ -42,64 +42,23 @@
static really_inline
u32 clz32_impl(u32 x) {
#if defined(_WIN32)
unsigned long r;
_BitScanReverse(&r, x);
return 31 - r;
#else
return clz32_impl_c(x);
#endif
}
static really_inline
u32 clz64_impl(u64a x) {
#if defined(_WIN64)
unsigned long r;
_BitScanReverse64(&r, x);
return 63 - r;
#elif defined(_WIN32)
unsigned long x1 = (u32)x;
unsigned long x2 = (u32)(x >> 32);
unsigned long r;
if (x2) {
_BitScanReverse(&r, x2);
return (u32)(31 - r);
}
_BitScanReverse(&r, (u32)x1);
return (u32)(63 - r);
#else
return clz64_impl_c(x);
#endif
}
// CTZ (count trailing zero) implementations.
static really_inline
u32 ctz32_impl(u32 x) {
#if defined(_WIN32)
unsigned long r;
_BitScanForward(&r, x);
return r;
#else
return ctz32_impl_c(x);
#endif
}
static really_inline
u32 ctz64_impl(u64a x) {
#if defined(_WIN64)
unsigned long r;
_BitScanForward64(&r, x);
return r;
#elif defined(_WIN32)
unsigned long r;
if (_BitScanForward(&r, (u32)x)) {
return (u32)r;
}
_BitScanForward(&r, x >> 32);
return (u32)(r + 32);
#else
return ctz64_impl_c(x);
#endif
}
static really_inline

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@@ -33,7 +33,7 @@
#include "hs_internal.h"
#include "util/arch.h"
#if !defined(_WIN32) && !defined(CPUID_H_)
#if !defined(CPUID_H_)
#include <cpuid.h>
#endif

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@@ -32,7 +32,7 @@
#include "ue2common.h"
#include "util/arch/common/cpuid_flags.h"
#if !defined(_WIN32) && !defined(CPUID_H_)
#if !defined(CPUID_H_)
#include <cpuid.h>
/* system header doesn't have a header guard */
#define CPUID_H_
@@ -46,16 +46,7 @@ extern "C"
static inline
void cpuid(unsigned int op, unsigned int leaf, unsigned int *eax,
unsigned int *ebx, unsigned int *ecx, unsigned int *edx) {
#ifndef _WIN32
__cpuid_count(op, leaf, *eax, *ebx, *ecx, *edx);
#else
int a[4];
__cpuidex(a, op, leaf);
*eax = a[0];
*ebx = a[1];
*ecx = a[2];
*edx = a[3];
#endif
}
// ECX
@@ -95,9 +86,6 @@ void cpuid(unsigned int op, unsigned int leaf, unsigned int *eax,
static inline
u64a xgetbv(u32 op) {
#if defined(_WIN32) || defined(__INTEL_COMPILER)
return _xgetbv(op);
#else
u32 a, d;
__asm__ volatile (
"xgetbv\n"
@@ -105,14 +93,10 @@ u64a xgetbv(u32 op) {
"=d"(d)
: "c"(op));
return ((u64a)d << 32) + a;
#endif
}
static inline
int check_avx2(void) {
#if defined(__INTEL_COMPILER)
return _may_i_use_cpu_feature(_FEATURE_AVX2);
#else
unsigned int eax, ebx, ecx, edx;
cpuid(1, 0, &eax, &ebx, &ecx, &edx);
@@ -141,7 +125,6 @@ int check_avx2(void) {
}
return 0;
#endif
}
static inline
@@ -149,9 +132,6 @@ int check_avx512(void) {
/*
* For our purposes, having avx512 really means "can we use AVX512BW?"
*/
#if defined(__INTEL_COMPILER)
return _may_i_use_cpu_feature(_FEATURE_AVX512BW | _FEATURE_AVX512VL);
#else
unsigned int eax, ebx, ecx, edx;
cpuid(1, 0, &eax, &ebx, &ecx, &edx);
@@ -184,14 +164,10 @@ int check_avx512(void) {
}
return 0;
#endif
}
static inline
int check_avx512vbmi(void) {
#if defined(__INTEL_COMPILER)
return _may_i_use_cpu_feature(_FEATURE_AVX512VBMI);
#else
unsigned int eax, ebx, ecx, edx;
cpuid(1, 0, &eax, &ebx, &ecx, &edx);
@@ -229,7 +205,6 @@ int check_avx512vbmi(void) {
}
return 0;
#endif
}
static inline

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@@ -38,12 +38,12 @@
#define HAVE_SIMD_128_BITS
#endif
#if defined(__SSE4_1__) || (defined(_WIN32) && defined(__AVX__))
#if defined(__SSE4_1__) || defined(__AVX__)
#define HAVE_SSE41
#define HAVE_SIMD_128_BITS
#endif
#if defined(__SSE4_2__) || (defined(_WIN32) && defined(__AVX__))
#if defined(__SSE4_2__) || defined(__AVX__)
#define HAVE_SSE42
#define HAVE_SIMD_128_BITS
#endif
@@ -78,30 +78,16 @@
#define VECTORSIZE 16
#endif
/*
* ICC and MSVC don't break out POPCNT or BMI/2 as separate pre-def macros
*/
#if defined(__POPCNT__) || \
(defined(__INTEL_COMPILER) && defined(__SSE4_2__)) || \
(defined(_WIN32) && defined(__AVX__))
#if defined(__POPCNT__)
#define HAVE_POPCOUNT_INSTR
#endif
#if defined(__BMI__) || (defined(_WIN32) && defined(__AVX2__)) || \
(defined(__INTEL_COMPILER) && defined(__AVX2__))
#if defined(__BMI__)
#define HAVE_BMI
#endif
#if defined(__BMI2__) || (defined(_WIN32) && defined(__AVX2__)) || \
(defined(__INTEL_COMPILER) && defined(__AVX2__))
#if defined(__BMI2__)
#define HAVE_BMI2
#endif
/*
* MSVC uses a different form of inline asm
*/
#if defined(_WIN32) && defined(_MSC_VER)
#define NO_ASM
#endif
#endif // UTIL_ARCH_X86_H_

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@@ -56,11 +56,7 @@ void describeChar(ostream &os, char c, enum cc_output_t out_type) {
const string backslash((out_type == CC_OUT_DOT ? 2 : 1), '\\');
#ifdef _WIN32
if (c >= 0x21 && c < 0x7F && c != '\\') {
#else
if (isgraph(c) && c != '\\') {
#endif
if (escaped.find(c) != string::npos) {
os << backslash << c;
} else if (out_type == CC_OUT_DOT

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@@ -1197,11 +1197,7 @@ u32 mmbit_sparse_iter_begin(const u8 *bits, u32 total_bits, u32 *idx,
assert(ISALIGNED_N(it_root, alignof(struct mmbit_sparse_iter)));
// Our state _may_ be on the stack
#ifndef _WIN32
assert(ISALIGNED_N(s, alignof(struct mmbit_sparse_state)));
#else
assert(ISALIGNED_N(s, 4));
#endif
MDEBUG_PRINTF("%p total_bits %u\n", bits, total_bits);
// iterator should have _something_ at the root level
@@ -1309,11 +1305,7 @@ u32 mmbit_sparse_iter_next(const u8 *bits, u32 total_bits, u32 last_key,
assert(ISALIGNED_N(it_root, alignof(struct mmbit_sparse_iter)));
// Our state _may_ be on the stack
#ifndef _WIN32
assert(ISALIGNED_N(s, alignof(struct mmbit_sparse_state)));
#else
assert(ISALIGNED_N(s, 4));
#endif
MDEBUG_PRINTF("%p total_bits %u\n", bits, total_bits);
MDEBUG_PRINTF("NEXT (total_bits=%u, last_key=%u)\n", total_bits, last_key);
@@ -1466,11 +1458,7 @@ void mmbit_sparse_iter_unset(u8 *bits, u32 total_bits,
assert(ISALIGNED_N(it, alignof(struct mmbit_sparse_iter)));
// Our state _may_ be on the stack
#ifndef _WIN32
assert(ISALIGNED_N(s, alignof(struct mmbit_sparse_state)));
#else
assert(ISALIGNED_N(s, 4));
#endif
MDEBUG_PRINTF("%p total_bits %u\n", bits, total_bits);

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@@ -38,36 +38,38 @@
static really_inline
u32 popcount32(u32 x) {
#if defined(HAVE_POPCOUNT_INSTR)
// Single-instruction builtin.
return _mm_popcnt_u32(x);
#else
// Fast branch-free version from bit-twiddling hacks as older Intel
// processors do not have a POPCNT instruction.
x -= (x >> 1) & 0x55555555;
x = (x & 0x33333333) + ((x >> 2) & 0x33333333);
return (((x + (x >> 4)) & 0xf0f0f0f) * 0x1010101) >> 24;
#endif
return __builtin_popcount(x);
// #if defined(HAVE_POPCOUNT_INSTR)
// // Single-instruction builtin.
// return _mm_popcnt_u32(x);
// #else
// // Fast branch-free version from bit-twiddling hacks as older Intel
// // processors do not have a POPCNT instruction.
// x -= (x >> 1) & 0x55555555;
// x = (x & 0x33333333) + ((x >> 2) & 0x33333333);
// return (((x + (x >> 4)) & 0xf0f0f0f) * 0x1010101) >> 24;
// #endif
}
static really_inline
u32 popcount64(u64a x) {
#if defined(ARCH_X86_64)
# if defined(HAVE_POPCOUNT_INSTR)
// Single-instruction builtin.
return (u32)_mm_popcnt_u64(x);
# else
// Fast branch-free version from bit-twiddling hacks as older Intel
// processors do not have a POPCNT instruction.
x -= (x >> 1) & 0x5555555555555555;
x = (x & 0x3333333333333333) + ((x >> 2) & 0x3333333333333333);
x = (x + (x >> 4)) & 0x0f0f0f0f0f0f0f0f;
return (x * 0x0101010101010101) >> 56;
# endif
#else
// Synthesise from two 32-bit cases.
return popcount32(x >> 32) + popcount32(x);
#endif
return __builtin_popcountll(x);
// #if defined(ARCH_X86_64)
// # if defined(HAVE_POPCOUNT_INSTR)
// // Single-instruction builtin.
// return (u32)_mm_popcnt_u64(x);
// # else
// // Fast branch-free version from bit-twiddling hacks as older Intel
// // processors do not have a POPCNT instruction.
// x -= (x >> 1) & 0x5555555555555555;
// x = (x & 0x3333333333333333) + ((x >> 2) & 0x3333333333333333);
// x = (x + (x >> 4)) & 0x0f0f0f0f0f0f0f0f;
// return (x * 0x0101010101010101) >> 56;
// # endif
// #else
// // Synthesise from two 32-bit cases.
// return popcount32(x >> 32) + popcount32(x);
// #endif
}
#endif /* UTIL_POPCOUNT_H_ */

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@@ -35,12 +35,7 @@
#include "ue2common.h"
#if !defined(_WIN32)
#define PACKED__MAY_ALIAS __attribute__((packed, may_alias))
#else
#define PACKED__MAY_ALIAS
#pragma pack(push, 1) // pack everything until told otherwise
#endif
/// Perform an unaligned 16-bit load
static really_inline
@@ -89,9 +84,6 @@ void unaligned_store_u64a(void *ptr, u64a val) {
struct unaligned *uptr = (struct unaligned *)ptr;
uptr->u = val;
}
#if defined(_WIN32)
#pragma pack(pop)
#endif // win32
#undef PACKED__MAY_ALIAS